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34 | 34 | #include "llvm/IR/IntrinsicsSPIRV.h" |
35 | 35 | #include "llvm/Support/Debug.h" |
36 | 36 | #include "llvm/Support/ErrorHandling.h" |
37 | | - |
38 | 37 | #define DEBUG_TYPE "spirv-isel" |
| 38 | +#ifdef _MSC_VER |
| 39 | + #define NO_OPTIMIZE __pragma(optimize("", off)) |
| 40 | +#elif defined(__GNUC__) || defined(__clang__) |
| 41 | + #define NO_OPTIMIZE __attribute__((optimize("O0"))) |
| 42 | +#else |
| 43 | + #define NO_OPTIMIZE |
| 44 | +#endif |
| 45 | + |
39 | 46 |
|
40 | 47 | using namespace llvm; |
41 | 48 | namespace CL = SPIRV::OpenCLExtInst; |
@@ -4127,22 +4134,25 @@ bool SPIRVInstructionSelector::selectIsFpclass(Register ResVReg, const SPIRVType |
4127 | 4134 | } |
4128 | 4135 |
|
4129 | 4136 |
|
4130 | | - //Instruction Template |
| 4137 | + // Instruction Template |
4131 | 4138 | auto instructionTemplate = [&](unsigned Opcode, SPIRVType* DestType, SPIRVType* ReturnType, auto&&... args) -> Register { |
4132 | 4139 | Register result = MRI->createVirtualRegister(GR.getRegClass(DestType)); |
4133 | 4140 | auto &Instr = MIRBuilder.buildInstr(Opcode) |
4134 | 4141 | .addDef(result) |
4135 | 4142 | .addUse(GR.getSPIRVTypeID(DestType)); |
4136 | | - |
4137 | | - ([&](auto&& arg) __attribute__((optimize("O0"))) { |
4138 | | - if(std::is_integral_v<std::decay_t<decltype(arg)>>) { |
4139 | | - Instr.addImm(arg); |
4140 | | - }else{ |
4141 | | - Instr.addUse(arg); |
4142 | | - } |
4143 | | - }(args), ...); |
| 4143 | + |
| 4144 | + (void)std::initializer_list<int>{ |
| 4145 | + ([&](auto&& arg) NO_OPTIMIZE { |
| 4146 | + if constexpr (std::is_integral_v<std::decay_t<decltype(arg)>>) { |
| 4147 | + Instr.addImm(arg); |
| 4148 | + } else { |
| 4149 | + Instr.addUse(arg); |
| 4150 | + } |
| 4151 | + }(args), 0)... |
| 4152 | + }; |
4144 | 4153 | return result; |
4145 | 4154 | }; |
| 4155 | + |
4146 | 4156 | //function to check if the sign bit is set or not |
4147 | 4157 | //1 sign is set if 0 sign is not set |
4148 | 4158 | //inf && sign == 1 then -ve infinity |
@@ -4298,7 +4308,7 @@ bool SPIRVInstructionSelector::selectIsFpclass(Register ResVReg, const SPIRVType |
4298 | 4308 | } |
4299 | 4309 | //check if the number is Zero |
4300 | 4310 | if(FPClass & fcZero){ |
4301 | | - auto SetUpCMPToZero = [&](Register BitCastToInt, |
| 4311 | + auto SetUpCMPToZero = [&, bitWidth](Register BitCastToInt, |
4302 | 4312 | bool IsPositive) -> Register { |
4303 | 4313 | APInt ZeroInt = APInt::getZero(bitWidth); |
4304 | 4314 | Register constantZero; |
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