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llvm/lib/Target/AArch64/AArch64BranchTargets.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -150,10 +150,9 @@ void AArch64BranchTargets::addBTI(MachineBasicBlock &MBB, bool CouldCall,
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++MBBI)
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;
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// PACI[AB]SP are compatible with BTI c, independently of SCTLR_EL1.BT[01].
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// If SCTLR_EL1.BT[01] is set to 1, they are compatible with BTI jc, but we
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// cannot rely on that it compile time. Therefore, we can only skip adding a
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// BTI c for these.
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// PACI[AB]SP are implicitly BTI c so insertion of a BTI can be skipped in
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// this case. Depending on the runtime value of SCTLR_EL1.BT[01], they are not
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// equivalent to a BTI jc, which still requires an additional BTI.
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if (MBBI != MBB.end() && ((HintNum & BTIMask) == BTIC) &&
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(MBBI->getOpcode() == AArch64::PACIASP ||
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MBBI->getOpcode() == AArch64::PACIBSP))

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