init

Author: pranavk

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -53,6 +53,7 @@
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/CodeGen/TargetCallingConv.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
+#include "llvm/CodeGen/TargetLowering.h"
 #include "llvm/CodeGen/TargetOpcodes.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/CodeGenTypes/MachineValueType.h"
@@ -1268,6 +1269,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
     for (auto Op : {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::STRICT_SINT_TO_FP,
                     ISD::STRICT_UINT_TO_FP})
       for (auto VT : {MVT::v2i32, MVT::v2i64, MVT::v4i32})
+        // and this is where v2i64 is marked custom
         setOperationAction(Op, VT, Custom);
 
     if (Subtarget->hasFullFP16()) {
@@ -1285,6 +1287,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
     } else {
       // when AArch64 doesn't have fullfp16 support, promote the input
       // to i32 first.
+      // this is where the promotion from v8i8 to v8i32 is dictated.
       setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v8i8, MVT::v8i32);
       setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v8i8, MVT::v8i32);
       setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v16i8, MVT::v16i32);
@@ -5095,6 +5098,31 @@ SDValue AArch64TargetLowering::LowerVectorINT_TO_FP(SDValue Op,
   uint64_t VTSize = VT.getFixedSizeInBits();
   uint64_t InVTSize = InVT.getFixedSizeInBits();
   if (VTSize < InVTSize) {
+    bool IsTargetf32Orf64 = VT.getVectorElementType() == MVT::f32 ||
+                            VT.getVectorElementType() == MVT::f64;
+    bool IsTargetf16 = false;
+    // check if Op has any uses that only boils down to f16.
+    if (Op.hasOneUse() &&
+        Op->user_begin()->getOpcode() == ISD::CONCAT_VECTORS &&
+        Op->user_begin()->hasOneUse() &&
+        Op->user_begin()->user_begin()->getOpcode() == ISD::FP_ROUND &&
+        Op->user_begin()->user_begin()->getValueType(0).isVector() &&
+        Op->user_begin()
+                ->user_begin()
+                ->getValueType(0)
+                .getVectorElementType() == MVT::f16) {
+      IsTargetf16 = true;
+    }
+
+    if (IsTargetf32Orf64 && !IsTargetf16) {
+      // AArch64 doesn't have a direct vector instruction to convert
+      // fixed point to floating point AND narrow it at the same time.
+      // Additional rounding when the target is f32/f64 causes subtle
+      // differences across different platforms (that do have such
+      // instructions). Conversion to f16 however is fine.
+      return SDValue();
+    }
+
     MVT CastVT =
         MVT::getVectorVT(MVT::getFloatingPointVT(InVT.getScalarSizeInBits()),
                          InVT.getVectorNumElements());