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RKSimonRKSimon
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[X86] combineConcatVectorOps - convert (V)SHUFPS concatenation to use combineConcatVectorOps recursion (#130426)
Only concatenate X86ISD::SHUFP nodes if at least one operand is beneficial to concatenate - helps prevent lot of unnecessary AVX1 concatenations
1 parent aff6ab9 commit 6f77f53

11 files changed

+118
-113
lines changed

‎llvm/lib/Target/X86/X86ISelLowering.cpp‎

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -58006,13 +58006,18 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5800658006
}
5800758007
case X86ISD::SHUFP: {
5800858008
// Add SHUFPD support if/when necessary.
58009-
if (!IsSplat && VT.getScalarType() == MVT::f32 &&
58009+
if (!IsSplat &&
58010+
(VT == MVT::v8f32 || (MVT::v16f32 && Subtarget.useAVX512Regs())) &&
5801058011
llvm::all_of(Ops, [Op0](SDValue Op) {
5801158012
return Op.getOperand(2) == Op0.getOperand(2);
5801258013
})) {
58013-
return DAG.getNode(Op0.getOpcode(), DL, VT,
58014-
ConcatSubOperand(VT, Ops, 0),
58015-
ConcatSubOperand(VT, Ops, 1), Op0.getOperand(2));
58014+
SDValue Concat0 = CombineSubOperand(VT, Ops, 0);
58015+
SDValue Concat1 = CombineSubOperand(VT, Ops, 1);
58016+
if (Concat0 || Concat1)
58017+
return DAG.getNode(Op0.getOpcode(), DL, VT,
58018+
Concat0 ? Concat0 : ConcatSubOperand(VT, Ops, 0),
58019+
Concat1 ? Concat1 : ConcatSubOperand(VT, Ops, 1),
58020+
Op0.getOperand(2));
5801658021
}
5801758022
break;
5801858023
}

‎llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll‎

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -289,31 +289,31 @@ define void @truncstore_v8i64_v8i32(<8 x i64> %x, ptr %p, <8 x i32> %mask) {
289289
; AVX1-NEXT: vpcmpeqd %xmm4, %xmm2, %xmm2
290290
; AVX1-NEXT: vpxor %xmm5, %xmm2, %xmm2
291291
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
292-
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
293-
; AVX1-NEXT: vmovddup {{.*#+}} xmm4 = [2147483647,2147483647]
294-
; AVX1-NEXT: # xmm4 = mem[0,0]
292+
; AVX1-NEXT: vmovddup {{.*#+}} xmm3 = [2147483647,2147483647]
293+
; AVX1-NEXT: # xmm3 = mem[0,0]
294+
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm3, %xmm4
295+
; AVX1-NEXT: vblendvpd %xmm4, %xmm1, %xmm3, %xmm4
296+
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
297+
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm3, %xmm5
298+
; AVX1-NEXT: vblendvpd %xmm5, %xmm1, %xmm3, %xmm1
299+
; AVX1-NEXT: vpcmpgtq %xmm0, %xmm3, %xmm5
300+
; AVX1-NEXT: vblendvpd %xmm5, %xmm0, %xmm3, %xmm5
301+
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
302+
; AVX1-NEXT: vpcmpgtq %xmm0, %xmm3, %xmm6
303+
; AVX1-NEXT: vblendvpd %xmm6, %xmm0, %xmm3, %xmm0
304+
; AVX1-NEXT: vmovddup {{.*#+}} xmm3 = [18446744071562067968,18446744071562067968]
305+
; AVX1-NEXT: # xmm3 = mem[0,0]
306+
; AVX1-NEXT: vpcmpgtq %xmm3, %xmm0, %xmm6
307+
; AVX1-NEXT: vblendvpd %xmm6, %xmm0, %xmm3, %xmm0
308+
; AVX1-NEXT: vpcmpgtq %xmm3, %xmm5, %xmm6
309+
; AVX1-NEXT: vblendvpd %xmm6, %xmm5, %xmm3, %xmm5
310+
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm5[0,2],xmm0[0,2]
311+
; AVX1-NEXT: vpcmpgtq %xmm3, %xmm1, %xmm5
312+
; AVX1-NEXT: vblendvpd %xmm5, %xmm1, %xmm3, %xmm1
295313
; AVX1-NEXT: vpcmpgtq %xmm3, %xmm4, %xmm5
296-
; AVX1-NEXT: vblendvpd %xmm5, %xmm3, %xmm4, %xmm3
297-
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5
298-
; AVX1-NEXT: vpcmpgtq %xmm5, %xmm4, %xmm6
299-
; AVX1-NEXT: vblendvpd %xmm6, %xmm5, %xmm4, %xmm5
300-
; AVX1-NEXT: vpcmpgtq %xmm0, %xmm4, %xmm6
301-
; AVX1-NEXT: vblendvpd %xmm6, %xmm0, %xmm4, %xmm0
302-
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm4, %xmm6
303-
; AVX1-NEXT: vblendvpd %xmm6, %xmm1, %xmm4, %xmm1
304-
; AVX1-NEXT: vmovddup {{.*#+}} xmm4 = [18446744071562067968,18446744071562067968]
305-
; AVX1-NEXT: # xmm4 = mem[0,0]
306-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm1, %xmm6
307-
; AVX1-NEXT: vblendvpd %xmm6, %xmm1, %xmm4, %xmm1
308-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm0, %xmm6
309-
; AVX1-NEXT: vblendvpd %xmm6, %xmm0, %xmm4, %xmm0
310-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm5, %xmm6
311-
; AVX1-NEXT: vblendvpd %xmm6, %xmm5, %xmm4, %xmm5
312-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm6
313-
; AVX1-NEXT: vblendvpd %xmm6, %xmm3, %xmm4, %xmm3
314-
; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm3
314+
; AVX1-NEXT: vblendvpd %xmm5, %xmm4, %xmm3, %xmm3
315+
; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm3[0,2],xmm1[0,2]
315316
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
316-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm3[0,2],ymm0[4,6],ymm3[4,6]
317317
; AVX1-NEXT: vmaskmovps %ymm0, %ymm2, (%rdi)
318318
; AVX1-NEXT: vzeroupper
319319
; AVX1-NEXT: retq

‎llvm/test/CodeGen/X86/masked_store_trunc_usat.ll‎

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -224,29 +224,29 @@ define void @truncstore_v8i64_v8i32(<8 x i64> %x, ptr %p, <8 x i32> %mask) {
224224
; AVX1-NEXT: vpcmpeqd %xmm4, %xmm2, %xmm2
225225
; AVX1-NEXT: vpxor %xmm5, %xmm2, %xmm2
226226
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
227-
; AVX1-NEXT: vmovddup {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
228-
; AVX1-NEXT: # xmm3 = mem[0,0]
229-
; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm4
230-
; AVX1-NEXT: vmovddup {{.*#+}} xmm5 = [9223372041149743103,9223372041149743103]
231-
; AVX1-NEXT: # xmm5 = mem[0,0]
232-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm5, %xmm4
233-
; AVX1-NEXT: vmovddup {{.*#+}} xmm6 = [4294967295,4294967295]
227+
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
228+
; AVX1-NEXT: vmovddup {{.*#+}} xmm4 = [9223372036854775808,9223372036854775808]
229+
; AVX1-NEXT: # xmm4 = mem[0,0]
230+
; AVX1-NEXT: vpxor %xmm4, %xmm3, %xmm5
231+
; AVX1-NEXT: vmovddup {{.*#+}} xmm6 = [9223372041149743103,9223372041149743103]
234232
; AVX1-NEXT: # xmm6 = mem[0,0]
235-
; AVX1-NEXT: vblendvpd %xmm4, %xmm1, %xmm6, %xmm4
236-
; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm7
237-
; AVX1-NEXT: vpcmpgtq %xmm7, %xmm5, %xmm7
238-
; AVX1-NEXT: vblendvpd %xmm7, %xmm0, %xmm6, %xmm7
239-
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
240-
; AVX1-NEXT: vpxor %xmm3, %xmm1, %xmm8
241-
; AVX1-NEXT: vpcmpgtq %xmm8, %xmm5, %xmm8
242-
; AVX1-NEXT: vblendvpd %xmm8, %xmm1, %xmm6, %xmm1
243-
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
244-
; AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm3
245-
; AVX1-NEXT: vpcmpgtq %xmm3, %xmm5, %xmm3
246-
; AVX1-NEXT: vblendvpd %xmm3, %xmm0, %xmm6, %xmm0
233+
; AVX1-NEXT: vpcmpgtq %xmm5, %xmm6, %xmm5
234+
; AVX1-NEXT: vmovddup {{.*#+}} xmm7 = [4294967295,4294967295]
235+
; AVX1-NEXT: # xmm7 = mem[0,0]
236+
; AVX1-NEXT: vblendvpd %xmm5, %xmm3, %xmm7, %xmm3
237+
; AVX1-NEXT: vpxor %xmm4, %xmm0, %xmm5
238+
; AVX1-NEXT: vpcmpgtq %xmm5, %xmm6, %xmm5
239+
; AVX1-NEXT: vblendvpd %xmm5, %xmm0, %xmm7, %xmm0
240+
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm3[0,2]
241+
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
242+
; AVX1-NEXT: vpxor %xmm4, %xmm3, %xmm5
243+
; AVX1-NEXT: vpcmpgtq %xmm5, %xmm6, %xmm5
244+
; AVX1-NEXT: vblendvpd %xmm5, %xmm3, %xmm7, %xmm3
245+
; AVX1-NEXT: vpxor %xmm4, %xmm1, %xmm4
246+
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm6, %xmm4
247+
; AVX1-NEXT: vblendvpd %xmm4, %xmm1, %xmm7, %xmm1
248+
; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm3[0,2]
247249
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
248-
; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm7, %ymm1
249-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[0,2],ymm1[4,6],ymm0[4,6]
250250
; AVX1-NEXT: vmaskmovps %ymm0, %ymm2, (%rdi)
251251
; AVX1-NEXT: vzeroupper
252252
; AVX1-NEXT: retq

‎llvm/test/CodeGen/X86/vector-fshl-256.ll‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -887,15 +887,15 @@ define <8 x i32> @splatvar_funnnel_v8i32(<8 x i32> %x, <8 x i32> %y, <8 x i32> %
887887
; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm5 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
888888
; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
889889
; AVX1-NEXT: vpsllq %xmm2, %xmm5, %xmm5
890-
; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm6 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
891-
; AVX1-NEXT: vpsllq %xmm2, %xmm6, %xmm6
892-
; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5
893890
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
894891
; AVX1-NEXT: vpsllq %xmm2, %xmm3, %xmm3
892+
; AVX1-NEXT: vshufps {{.*#+}} xmm3 = xmm3[1,3],xmm5[1,3]
893+
; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
894+
; AVX1-NEXT: vpsllq %xmm2, %xmm4, %xmm4
895895
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
896896
; AVX1-NEXT: vpsllq %xmm2, %xmm0, %xmm0
897+
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm4[1,3]
897898
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
898-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm5[1,3],ymm0[5,7],ymm5[5,7]
899899
; AVX1-NEXT: retq
900900
;
901901
; AVX2-LABEL: splatvar_funnnel_v8i32:
@@ -970,15 +970,15 @@ define <8 x i32> @splatvar_funnnel_v8i32(<8 x i32> %x, <8 x i32> %y, <8 x i32> %
970970
; XOPAVX1-NEXT: vpunpckhdq {{.*#+}} xmm5 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
971971
; XOPAVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
972972
; XOPAVX1-NEXT: vpsllq %xmm2, %xmm5, %xmm5
973-
; XOPAVX1-NEXT: vpunpckhdq {{.*#+}} xmm6 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
974-
; XOPAVX1-NEXT: vpsllq %xmm2, %xmm6, %xmm6
975-
; XOPAVX1-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5
976973
; XOPAVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
977974
; XOPAVX1-NEXT: vpsllq %xmm2, %xmm3, %xmm3
975+
; XOPAVX1-NEXT: vshufps {{.*#+}} xmm3 = xmm3[1,3],xmm5[1,3]
976+
; XOPAVX1-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
977+
; XOPAVX1-NEXT: vpsllq %xmm2, %xmm4, %xmm4
978978
; XOPAVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
979979
; XOPAVX1-NEXT: vpsllq %xmm2, %xmm0, %xmm0
980+
; XOPAVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm4[1,3]
980981
; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
981-
; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm5[1,3],ymm0[5,7],ymm5[5,7]
982982
; XOPAVX1-NEXT: retq
983983
;
984984
; XOPAVX2-LABEL: splatvar_funnnel_v8i32:

‎llvm/test/CodeGen/X86/vector-fshl-rot-256.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -668,15 +668,15 @@ define <8 x i32> @splatvar_funnnel_v8i32(<8 x i32> %x, <8 x i32> %amt) nounwind
668668
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
669669
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[2,2,3,3]
670670
; AVX1-NEXT: vpsllq %xmm1, %xmm3, %xmm3
671-
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[2,2,3,3]
672-
; AVX1-NEXT: vpsllq %xmm1, %xmm4, %xmm4
673-
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3
674671
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,1,1]
675672
; AVX1-NEXT: vpsllq %xmm1, %xmm2, %xmm2
673+
; AVX1-NEXT: vshufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3]
674+
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[2,2,3,3]
675+
; AVX1-NEXT: vpsllq %xmm1, %xmm3, %xmm3
676676
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
677677
; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0
678+
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm3[1,3]
678679
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
679-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm3[1,3],ymm0[5,7],ymm3[5,7]
680680
; AVX1-NEXT: retq
681681
;
682682
; AVX2-LABEL: splatvar_funnnel_v8i32:

‎llvm/test/CodeGen/X86/vector-fshr-256.ll‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -918,15 +918,15 @@ define <8 x i32> @splatvar_funnnel_v8i32(<8 x i32> %x, <8 x i32> %y, <8 x i32> %
918918
; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm5 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
919919
; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
920920
; AVX1-NEXT: vpsrlq %xmm2, %xmm5, %xmm5
921-
; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm6 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
922-
; AVX1-NEXT: vpsrlq %xmm2, %xmm6, %xmm6
923-
; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5
924921
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
925922
; AVX1-NEXT: vpsrlq %xmm2, %xmm3, %xmm3
923+
; AVX1-NEXT: vshufps {{.*#+}} xmm3 = xmm3[0,2],xmm5[0,2]
924+
; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
925+
; AVX1-NEXT: vpsrlq %xmm2, %xmm4, %xmm4
926926
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
927927
; AVX1-NEXT: vpsrlq %xmm2, %xmm0, %xmm0
928+
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm4[0,2]
928929
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
929-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm5[0,2],ymm0[4,6],ymm5[4,6]
930930
; AVX1-NEXT: retq
931931
;
932932
; AVX2-LABEL: splatvar_funnnel_v8i32:
@@ -1002,15 +1002,15 @@ define <8 x i32> @splatvar_funnnel_v8i32(<8 x i32> %x, <8 x i32> %y, <8 x i32> %
10021002
; XOPAVX1-NEXT: vpunpckhdq {{.*#+}} xmm5 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
10031003
; XOPAVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
10041004
; XOPAVX1-NEXT: vpsrlq %xmm2, %xmm5, %xmm5
1005-
; XOPAVX1-NEXT: vpunpckhdq {{.*#+}} xmm6 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1006-
; XOPAVX1-NEXT: vpsrlq %xmm2, %xmm6, %xmm6
1007-
; XOPAVX1-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5
10081005
; XOPAVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
10091006
; XOPAVX1-NEXT: vpsrlq %xmm2, %xmm3, %xmm3
1007+
; XOPAVX1-NEXT: vshufps {{.*#+}} xmm3 = xmm3[0,2],xmm5[0,2]
1008+
; XOPAVX1-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1009+
; XOPAVX1-NEXT: vpsrlq %xmm2, %xmm4, %xmm4
10101010
; XOPAVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
10111011
; XOPAVX1-NEXT: vpsrlq %xmm2, %xmm0, %xmm0
1012+
; XOPAVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm4[0,2]
10121013
; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
1013-
; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm5[0,2],ymm0[4,6],ymm5[4,6]
10141014
; XOPAVX1-NEXT: retq
10151015
;
10161016
; XOPAVX2-LABEL: splatvar_funnnel_v8i32:

‎llvm/test/CodeGen/X86/vector-fshr-rot-256.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -703,15 +703,15 @@ define <8 x i32> @splatvar_funnnel_v8i32(<8 x i32> %x, <8 x i32> %amt) nounwind
703703
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
704704
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[2,2,3,3]
705705
; AVX1-NEXT: vpsrlq %xmm1, %xmm3, %xmm3
706-
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[2,2,3,3]
707-
; AVX1-NEXT: vpsrlq %xmm1, %xmm4, %xmm4
708-
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3
709706
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,1,1]
710707
; AVX1-NEXT: vpsrlq %xmm1, %xmm2, %xmm2
708+
; AVX1-NEXT: vshufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
709+
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[2,2,3,3]
710+
; AVX1-NEXT: vpsrlq %xmm1, %xmm3, %xmm3
711711
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
712712
; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
713+
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm3[0,2]
713714
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
714-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm3[0,2],ymm0[4,6],ymm3[4,6]
715715
; AVX1-NEXT: retq
716716
;
717717
; AVX2-LABEL: splatvar_funnnel_v8i32:

‎llvm/test/CodeGen/X86/vector-rotate-256.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -584,15 +584,15 @@ define <8 x i32> @splatvar_rotate_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
584584
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
585585
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[2,2,3,3]
586586
; AVX1-NEXT: vpsllq %xmm1, %xmm3, %xmm3
587-
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[2,2,3,3]
588-
; AVX1-NEXT: vpsllq %xmm1, %xmm4, %xmm4
589-
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3
590587
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,1,1]
591588
; AVX1-NEXT: vpsllq %xmm1, %xmm2, %xmm2
589+
; AVX1-NEXT: vshufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3]
590+
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[2,2,3,3]
591+
; AVX1-NEXT: vpsllq %xmm1, %xmm3, %xmm3
592592
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
593593
; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0
594+
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm3[1,3]
594595
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
595-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm3[1,3],ymm0[5,7],ymm3[5,7]
596596
; AVX1-NEXT: retq
597597
;
598598
; AVX2-LABEL: splatvar_rotate_v8i32:

‎llvm/test/CodeGen/X86/vector-trunc-packus.ll‎

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -676,26 +676,26 @@ define <8 x i32> @trunc_packus_v8i64_v8i32(ptr %p0) "min-legal-vector-width"="25
676676
; AVX1-NEXT: vmovdqa 32(%rdi), %xmm2
677677
; AVX1-NEXT: vmovdqa 48(%rdi), %xmm3
678678
; AVX1-NEXT: vpmovsxbd {{.*#+}} xmm4 = [4294967295,0,4294967295,0]
679-
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm4, %xmm5
680-
; AVX1-NEXT: vblendvpd %xmm5, %xmm1, %xmm4, %xmm1
679+
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm5
680+
; AVX1-NEXT: vblendvpd %xmm5, %xmm2, %xmm4, %xmm2
681681
; AVX1-NEXT: vpcmpgtq %xmm3, %xmm4, %xmm5
682682
; AVX1-NEXT: vblendvpd %xmm5, %xmm3, %xmm4, %xmm3
683683
; AVX1-NEXT: vpcmpgtq %xmm0, %xmm4, %xmm5
684684
; AVX1-NEXT: vblendvpd %xmm5, %xmm0, %xmm4, %xmm0
685-
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm5
686-
; AVX1-NEXT: vblendvpd %xmm5, %xmm2, %xmm4, %xmm2
685+
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm4, %xmm5
686+
; AVX1-NEXT: vblendvpd %xmm5, %xmm1, %xmm4, %xmm1
687687
; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4
688-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm2, %xmm5
689-
; AVX1-NEXT: vpand %xmm2, %xmm5, %xmm2
688+
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm1, %xmm5
689+
; AVX1-NEXT: vpand %xmm1, %xmm5, %xmm1
690690
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm0, %xmm5
691691
; AVX1-NEXT: vpand %xmm0, %xmm5, %xmm0
692-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm5
693-
; AVX1-NEXT: vpand %xmm3, %xmm5, %xmm3
694-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm1, %xmm4
695-
; AVX1-NEXT: vpand %xmm1, %xmm4, %xmm1
696-
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
697-
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
698-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm1[0,2],ymm0[4,6],ymm1[4,6]
692+
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
693+
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm1
694+
; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1
695+
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm2, %xmm3
696+
; AVX1-NEXT: vpand %xmm2, %xmm3, %xmm2
697+
; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm2[0,2],xmm1[0,2]
698+
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
699699
; AVX1-NEXT: retq
700700
;
701701
; AVX2-SLOW-LABEL: trunc_packus_v8i64_v8i32:

‎llvm/test/CodeGen/X86/vector-trunc-ssat.ll‎

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -697,27 +697,27 @@ define <8 x i32> @trunc_ssat_v8i64_v8i32(ptr %p0) "min-legal-vector-width"="256"
697697
; AVX1-NEXT: vmovdqa 48(%rdi), %xmm3
698698
; AVX1-NEXT: vmovddup {{.*#+}} xmm4 = [2147483647,2147483647]
699699
; AVX1-NEXT: # xmm4 = mem[0,0]
700-
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm4, %xmm5
701-
; AVX1-NEXT: vblendvpd %xmm5, %xmm1, %xmm4, %xmm1
700+
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm5
701+
; AVX1-NEXT: vblendvpd %xmm5, %xmm2, %xmm4, %xmm2
702702
; AVX1-NEXT: vpcmpgtq %xmm3, %xmm4, %xmm5
703703
; AVX1-NEXT: vblendvpd %xmm5, %xmm3, %xmm4, %xmm3
704704
; AVX1-NEXT: vpcmpgtq %xmm0, %xmm4, %xmm5
705705
; AVX1-NEXT: vblendvpd %xmm5, %xmm0, %xmm4, %xmm0
706-
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm4, %xmm5
707-
; AVX1-NEXT: vblendvpd %xmm5, %xmm2, %xmm4, %xmm2
706+
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm4, %xmm5
707+
; AVX1-NEXT: vblendvpd %xmm5, %xmm1, %xmm4, %xmm1
708708
; AVX1-NEXT: vmovddup {{.*#+}} xmm4 = [18446744071562067968,18446744071562067968]
709709
; AVX1-NEXT: # xmm4 = mem[0,0]
710-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm2, %xmm5
711-
; AVX1-NEXT: vblendvpd %xmm5, %xmm2, %xmm4, %xmm2
712-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm0, %xmm5
713-
; AVX1-NEXT: vblendvpd %xmm5, %xmm0, %xmm4, %xmm0
714-
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm5
715-
; AVX1-NEXT: vblendvpd %xmm5, %xmm3, %xmm4, %xmm3
716710
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm1, %xmm5
717711
; AVX1-NEXT: vblendvpd %xmm5, %xmm1, %xmm4, %xmm1
718-
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
719-
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
720-
; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm1[0,2],ymm0[4,6],ymm1[4,6]
712+
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm0, %xmm5
713+
; AVX1-NEXT: vblendvpd %xmm5, %xmm0, %xmm4, %xmm0
714+
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
715+
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm3, %xmm1
716+
; AVX1-NEXT: vblendvpd %xmm1, %xmm3, %xmm4, %xmm1
717+
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm2, %xmm3
718+
; AVX1-NEXT: vblendvpd %xmm3, %xmm2, %xmm4, %xmm2
719+
; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm2[0,2],xmm1[0,2]
720+
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
721721
; AVX1-NEXT: retq
722722
;
723723
; AVX2-SLOW-LABEL: trunc_ssat_v8i64_v8i32:

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