add -O3 test case for f32x2

Currently breaking for test_extract_i case because parameter symbols
cannot appear in add instructions. We need an intermediate mov.

Author: Prince781

llvm/test/CodeGen/NVPTX/f32x2-instructions.ll

@@ -1,13 +1,21 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; ## Full FP32x2 support enabled by default.
-; RUN: llc < %s -mtriple=nvptx64-nvidia-cuda -mcpu=sm_100                    \
-; RUN:         -O0 -disable-post-ra -frame-pointer=all -verify-machineinstrs \
+; RUN: llc < %s -mtriple=nvptx64-nvidia-cuda -mcpu=sm_100                      \
+; RUN:         -O0 -disable-post-ra -frame-pointer=all -verify-machineinstrs   \
 ; RUN: | FileCheck --check-prefixes=CHECK %s
 ; RUN: %if ptxas %{                                                            \
 ; RUN:  llc < %s -mtriple=nvptx64-nvidia-cuda -mcpu=sm_100                     \
 ; RUN:           -O0 -disable-post-ra -frame-pointer=all -verify-machineinstrs \
 ; RUN:  | %ptxas-verify -arch=sm_100                                           \
 ; RUN: %}
+; RUN: llc < %s -mtriple=nvptx64-nvidia-cuda -mcpu=sm_100                      \
+; RUN:         -O3 -verify-machineinstrs                                       \
+; RUN: | FileCheck --check-prefixes=CHECK-O3 %s
+; RUN: %if ptxas %{                                                            \
+; RUN:  llc < %s -mtriple=nvptx64-nvidia-cuda -mcpu=sm_100                     \
+; RUN:           -O3 -disable-post-ra -frame-pointer=all -verify-machineinstrs \
+; RUN:  | %ptxas-verify -arch=sm_100                                           \
+; RUN: %}
 
 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 target triple = "nvptx64-nvidia-cuda"