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diggerlindiggerlin
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remove hasSideEffects for XXSPLTIB
1 parent 7eaaa4e commit 716dddc

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3 files changed

+99
-6
lines changed

3 files changed

+99
-6
lines changed

‎llvm/lib/Target/PowerPC/PPCInstrVSX.td‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1659,8 +1659,6 @@ let Predicates = [HasVSX, HasP9Vector] in {
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RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
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// Vector Splat Immediate Byte
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// FIXME: Setting the hasSideEffects flag here to match current behaviour.
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let hasSideEffects = 1 in
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def XXSPLTIB : X_RD6_IMM8<60, 360, (outs vsrc:$XT), (ins u8imm:$IMM8),
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"xxspltib $XT, $IMM8", IIC_VecPerm, []>;
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‎llvm/test/CodeGen/PowerPC/memset-tail.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -380,9 +380,9 @@ define dso_local void @memsetTailV1B2(ptr nocapture noundef writeonly %p) local_
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;
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; P9-BE-LABEL: memsetTailV1B2:
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; P9-BE: # %bb.0: # %entry
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; P9-BE-NEXT: xxspltib 0, 15
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; P9-BE-NEXT: li 4, 3855
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; P9-BE-NEXT: sth 4, 16(3)
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; P9-BE-NEXT: xxspltib 0, 15
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; P9-BE-NEXT: stxv 0, 0(3)
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; P9-BE-NEXT: blr
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;
@@ -433,9 +433,9 @@ define dso_local void @memsetTailV1B1(ptr nocapture noundef writeonly %p) local_
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;
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; P9-BE-LABEL: memsetTailV1B1:
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; P9-BE: # %bb.0: # %entry
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; P9-BE-NEXT: xxspltib 0, 15
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; P9-BE-NEXT: li 4, 15
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; P9-BE-NEXT: stb 4, 16(3)
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; P9-BE-NEXT: xxspltib 0, 15
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; P9-BE-NEXT: stxv 0, 0(3)
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; P9-BE-NEXT: blr
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;
@@ -861,9 +861,9 @@ define dso_local void @memset2TailV1B2(ptr nocapture noundef writeonly %p) local
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;
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; P9-BE-LABEL: memset2TailV1B2:
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; P9-BE: # %bb.0: # %entry
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; P9-BE-NEXT: xxspltib 0, 165
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; P9-BE-NEXT: li 4, -23131
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; P9-BE-NEXT: sth 4, 16(3)
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; P9-BE-NEXT: xxspltib 0, 165
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; P9-BE-NEXT: stxv 0, 0(3)
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; P9-BE-NEXT: blr
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;
@@ -917,9 +917,9 @@ define dso_local void @memset2TailV1B1(ptr nocapture noundef writeonly %p) local
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;
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; P9-BE-LABEL: memset2TailV1B1:
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; P9-BE: # %bb.0: # %entry
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; P9-BE-NEXT: xxspltib 0, 165
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; P9-BE-NEXT: li 4, -91
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; P9-BE-NEXT: stb 4, 16(3)
922-
; P9-BE-NEXT: xxspltib 0, 165
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; P9-BE-NEXT: stxv 0, 0(3)
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; P9-BE-NEXT: blr
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;

‎llvm/test/CodeGen/PowerPC/pr127119.ll‎

Lines changed: 95 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,95 @@
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;; Test `xxspltib` hoist out loop.
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; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
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; RUN: %s -o - 2>&1 | FileCheck %s
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define void @_Z3fooPfS_Pi(ptr noalias nocapture noundef writeonly %_a, ptr noalias nocapture noundef readonly %In_a, ptr noalias nocapture noundef readonly %n) local_unnamed_addr #0 {
7+
entry:
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%0 = load i32, ptr %n, align 4
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%cmp9 = icmp sgt i32 %0, 0
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br i1 %cmp9, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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%wide.trip.count = zext nneg i32 %0 to i64
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%xtraiter = and i64 %wide.trip.count, 1
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%1 = icmp eq i32 %0, 1
16+
br i1 %1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new
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for.body.preheader.new:
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%unroll_iter = and i64 %wide.trip.count, 2147483646
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br label %for.body
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for.cond.cleanup.loopexit.unr-lcssa:
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%indvars.iv.unr = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next.1, %for.body ]
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%lcmp.mod.not = icmp eq i64 %xtraiter, 0
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br i1 %lcmp.mod.not, label %for.cond.cleanup, label %for.body.epil
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for.body.epil:
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%arrayidx.epil = getelementptr inbounds nuw float, ptr %In_a, i64 %indvars.iv.unr
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%2 = load float, ptr %arrayidx.epil, align 4
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%vecins.i.epil = insertelement <4 x float> poison, float %2, i64 0
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%3 = bitcast <4 x float> %vecins.i.epil to <16 x i8>
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%and1.i.epil = and <16 x i8> %3, <i8 6, i8 6, i8 6, i8 6, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>
33+
%4 = bitcast <16 x i8> %and1.i.epil to <4 x float>
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%vecext.i.epil = extractelement <4 x float> %4, i64 0
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%arrayidx5.epil = getelementptr inbounds nuw float, ptr %_a, i64 %indvars.iv.unr
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store float %vecext.i.epil, ptr %arrayidx5.epil, align 4
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br label %for.cond.cleanup
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for.cond.cleanup:
40+
ret void
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for.body:
43+
%indvars.iv = phi i64 [ 0, %for.body.preheader.new ], [ %indvars.iv.next.1, %for.body ]
44+
%niter = phi i64 [ 0, %for.body.preheader.new ], [ %niter.next.1, %for.body ]
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%arrayidx = getelementptr inbounds nuw float, ptr %In_a, i64 %indvars.iv
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%5 = load float, ptr %arrayidx, align 4
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%vecins.i = insertelement <4 x float> poison, float %5, i64 0
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%6 = bitcast <4 x float> %vecins.i to <16 x i8>
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%and1.i = and <16 x i8> %6, <i8 6, i8 6, i8 6, i8 6, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>
50+
%7 = bitcast <16 x i8> %and1.i to <4 x float>
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%vecext.i = extractelement <4 x float> %7, i64 0
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%arrayidx5 = getelementptr inbounds nuw float, ptr %_a, i64 %indvars.iv
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store float %vecext.i, ptr %arrayidx5, align 4
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%indvars.iv.next = or disjoint i64 %indvars.iv, 1
55+
%arrayidx.1 = getelementptr inbounds nuw float, ptr %In_a, i64 %indvars.iv.next
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%8 = load float, ptr %arrayidx.1, align 4
57+
%vecins.i.1 = insertelement <4 x float> poison, float %8, i64 0
58+
%9 = bitcast <4 x float> %vecins.i.1 to <16 x i8>
59+
%and1.i.1 = and <16 x i8> %9, <i8 6, i8 6, i8 6, i8 6, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>
60+
%10 = bitcast <16 x i8> %and1.i.1 to <4 x float>
61+
%vecext.i.1 = extractelement <4 x float> %10, i64 0
62+
%arrayidx5.1 = getelementptr inbounds nuw float, ptr %_a, i64 %indvars.iv.next
63+
store float %vecext.i.1, ptr %arrayidx5.1, align 4
64+
%indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
65+
%niter.next.1 = add i64 %niter, 2
66+
%niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
67+
br i1 %niter.ncmp.1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body
68+
}
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70+
attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr10" "target-features"="+altivec,+bpermd,+crbits,+crypto,+direct-move,+extdiv,+isa-v206-instructions,+isa-v207-instructions,+isa-v30-instructions,+isa-v31-instructions,+mma,+paired-vector-memops,+pcrelative-memops,+power10-vector,+power8-vector,+power9-vector,+prefix-instrs,+quadword-atomics,+vsx,-aix-shared-lib-tls-model-opt,-aix-small-local-dynamic-tls,-aix-small-local-exec-tls,-htm,-privileged,-rop-protect,-spe" }
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; CHECK: ._Z3fooPfS_Pi:
73+
; CHECK-NEXT: # %bb.0: # %entry
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; CHECK-NEXT: lwz 5, 0(5)
75+
; CHECK-NEXT: cmpwi 5, 1
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; CHECK-NEXT: bltlr 0
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; CHECK-NEXT: # %bb.1: # %for.body.preheader
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; CHECK-NEXT: li 6, 0
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; CHECK-NEXT: cmplwi 5, 1
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; CHECK-NEXT: beq 0, L..BB0_4
81+
; CHECK-NEXT: # %bb.2: # %for.body.preheader.new
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; CHECK-NEXT: rlwinm 6, 5, 0, 1, 30
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; CHECK-NEXT: xxspltib 0, 6
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; CHECK-NEXT: addi 9, 4, -8
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; CHECK-NEXT: addi 7, 3, -8
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; CHECK-NEXT: li 8, 8
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; CHECK-NEXT: li 10, 12
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; CHECK-NEXT: li 11, 4
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; CHECK-NEXT: addi 6, 6, -2
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; CHECK-NEXT: rldicl 6, 6, 63, 1
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; CHECK-NEXT: addi 6, 6, 1
92+
; CHECK-NEXT: mtctr 6
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; CHECK-NEXT: li 6, 0
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; CHECK-NEXT: .align 4
95+
; CHECK-NEXT: L..BB0_3:

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