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1 parent 9a4e40a commit 71755acCopy full SHA for 71755ac
mlir/test/Target/SPIRV/arithmetic-ops.mlir
@@ -87,7 +87,7 @@ spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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spirv.Return
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}
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spirv.func @dot_bf16(%arg0: vector<4xbf16>, %arg1: vector<4xbf16>) "None" {
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- // CHECK: spirv.Dot %{{.+}}, %{{.+}} : vector<4xbf16> -> f16
+ // CHECK: spirv.Dot %{{.+}}, %{{.+}} : vector<4xbf16> -> bf16
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%0 = spirv.Dot %arg0, %arg1 : vector<4xbf16> -> bf16
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