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[AMDGPU] Support alloca in AS0
This PR lowers an alloca in AS0 to an alloca in AS5 followed by an addrspacecast back to AS0.
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3 files changed

+38
-16
lines changed

3 files changed

+38
-16
lines changed

llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp

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@@ -330,6 +330,9 @@ class AMDGPUCodeGenPrepareImpl
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bool visitBitreverseIntrinsicInst(IntrinsicInst &I);
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bool visitMinNum(IntrinsicInst &I);
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bool visitSqrt(IntrinsicInst &I);
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bool visitAllocaInst(AllocaInst &I);
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bool run();
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};
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@@ -2355,6 +2358,24 @@ bool AMDGPUCodeGenPrepareImpl::visitSqrt(IntrinsicInst &Sqrt) {
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return true;
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}
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// Rewrite alloca with AS0 to alloca with AS5 followed by a addrspace cast.
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bool AMDGPUCodeGenPrepareImpl::visitAllocaInst(AllocaInst &I) {
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if (I.getAddressSpace() == DL.getAllocaAddrSpace())
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return false;
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assert(I.getAddressSpace() == 0 && "An alloca can't be in random AS");
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IRBuilder<> Builder(&I);
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AllocaInst *NewAI = Builder.CreateAlloca(
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I.getAllocatedType(), DL.getAllocaAddrSpace(), I.getArraySize());
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NewAI->takeName(&I);
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NewAI->setAlignment(I.getAlign());
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NewAI->copyMetadata(I);
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Value *CastI = Builder.CreateAddrSpaceCast(NewAI, I.getType(),
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NewAI->getName() + ".cast");
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I.replaceAllUsesWith(CastI);
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I.eraseFromParent();
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return true;
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}
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bool AMDGPUCodeGenPrepare::runOnFunction(Function &F) {
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if (skipFunction(F))
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return false;
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@@ -0,0 +1,17 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -passes=amdgpu-codegenprepare %s | FileCheck %s
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declare void @foo(ptr)
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define void @bar() {
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; CHECK-LABEL: define void @bar
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; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
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; CHECK-NEXT: [[ALLOCA_CAST:%.*]] = addrspacecast ptr addrspace(5) [[ALLOCA]] to ptr
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; CHECK-NEXT: call void @foo(ptr [[ALLOCA_CAST]])
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; CHECK-NEXT: ret void
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;
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%alloca = alloca i32, align 4
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call void @foo(ptr %alloca)
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ret void
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}

llvm/test/CodeGen/AMDGPU/assert-wrong-alloca-addrspace.ll

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