Address Review Feedback

lenary · lenary · commit 723863fe548e · 2025-05-28T11:33:15.000-07:00
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -641,8 +641,7 @@ void RISCVAsmBackend::addVendorReloc(const MCFragment &F, const MCFixup &Fixup,
   MCSymbol *VendorSymbol = It->getValue();
   const MCExpr *VendorExpr = MCSymbolRefExpr::create(VendorSymbol, Ctx);
   MCFixup VendorFixup =
-      MCFixup::create(Fixup.getOffset(), VendorExpr,
-                      FirstLiteralRelocationKind + ELF::R_RISCV_VENDOR);
+      MCFixup::create(Fixup.getOffset(), VendorExpr, ELF::R_RISCV_VENDOR);
   // Explicitly create MCValue so that the absolute symbol is not evaluated to
   // a constant.
   MCValue VendorTarget = MCValue::get(VendorSymbol);
@@ -700,14 +699,18 @@ bool RISCVAsmBackend::addReloc(const MCFragment &F, const MCFixup &Fixup,
       (getFixupKindInfo(Fixup.getKind()).Flags & MCFixupKindInfo::FKF_IsPCRel))
     IsResolved = isPCRelFixupResolved(Target.getAddSym(), F);
 
-  // Some Fixups require a vendor relocation, record it (directly) before we add
-  // the relocation.
-  if (!IsResolved || shouldForceRelocation(Fixup, Target)) {
+  if (IsResolved && shouldForceRelocation(Fixup, Target))
+    IsResolved = false;
+
+  if (!IsResolved) {
+    // Some Fixups require a vendor relocation, record it (directly) before we
+    // add the relocation.
     if (std::optional<StringRef> VendorIdentifier =
             getVendorIdentifierForFixup(Fixup.getTargetKind()))
       addVendorReloc(F, Fixup, *VendorIdentifier);
+
+    Asm->getWriter().recordRelocation(F, Fixup, Target, FixedValue);
   }
-  IsResolved = MCAsmBackend::addReloc(F, Fixup, Target, FixedValue, IsResolved);
 
   if (Fixup.isLinkerRelaxable()) {
     auto FA = MCFixup::create(Fixup.getOffset(), nullptr, ELF::R_RISCV_RELAX);
diff --git a/llvm/test/MC/RISCV/xqcibi-relocations.s b/llvm/test/MC/RISCV/xqcibi-relocations.s
@@ -21,53 +21,45 @@ this_section:
 # ASM: qc.bnei t1, 10, undef
 # OBJ: qc.bnei t1, 0xa, 0x0 <this_section>
 # OBJ-NEXT: R_RISCV_BRANCH undef{{$}}
-# OBJ-NOT: R_RISCV
 qc.bnei t1, 10, undef
 
 # ASM: qc.e.bgeui s0, 20, undef
-# OBJ: qc.e.bgeui s0, 0x14, 0x4 <this_section+0x4>
+# OBJ-NEXT: qc.e.bgeui s0, 0x14, 0x4 <this_section+0x4>
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM193 undef{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.bgeui s0, 20, undef
 
 
 # ASM: qc.bnei t2, 11, same_section
-# OBJ: qc.bnei t2, 0xb, 0x28 <same_section>
-# OBJ-NOT: R_RISCV
+# OBJ-NEXT: qc.bnei t2, 0xb, 0x28 <same_section>
 qc.bnei t2, 11, same_section
 
 # ASM: qc.e.bgeui s1, 21, same_section
-# OBJ: qc.e.bgeui s1, 0x15, 0x28 <same_section>
-# OBJ-NOT: R_RISCV
+# OBJ-NEXT: qc.e.bgeui s1, 0x15, 0x28 <same_section>
 qc.e.bgeui s1, 21, same_section
 
 
 # ASM: qc.bnei t2, 12, same_section_extern
-# OBJ: qc.bnei t2, 0xc, 0x14 <this_section+0x14>
+# OBJ-NEXT: qc.bnei t2, 0xc, 0x14 <this_section+0x14>
 # OBJ-NEXT: R_RISCV_BRANCH same_section_extern{{$}}
-# OBJ-NOT: R_RISCV
 qc.bnei t2, 12, same_section_extern
 
 # ASM: qc.e.bgeui s1, 22, same_section_extern
-# OBJ: qc.e.bgeui s1, 0x16, 0x18 <this_section+0x18>
+# OBJ-NEXT: qc.e.bgeui s1, 0x16, 0x18 <this_section+0x18>
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM193 same_section_extern{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.bgeui s1, 22, same_section_extern
 
 
 # ASM: qc.bnei t3, 13, other_section
-# OBJ: qc.bnei t3, 0xd, 0x1e <this_section+0x1e>
+# OBJ-NEXT: qc.bnei t3, 0xd, 0x1e <this_section+0x1e>
 # OBJ-NEXT: R_RISCV_BRANCH other_section{{$}}
-# OBJ-NOT: R_RISCV
 qc.bnei t3, 13, other_section
 
 # ASM: qc.e.bgeui s2, 23, other_section
-# OBJ: qc.e.bgeui s2, 0x17, 0x22 <this_section+0x22>
+# OBJ-NEXT: qc.e.bgeui s2, 0x17, 0x22 <this_section+0x22>
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM193 other_section{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.bgeui s2, 23, other_section
 
 
diff --git a/llvm/test/MC/RISCV/xqcilb-relocations.s b/llvm/test/MC/RISCV/xqcilb-relocations.s
@@ -19,57 +19,49 @@
 this_section:
 
 # ASM: qc.e.j undef
-# OBJ: qc.e.j 0x0
+# OBJ: qc.e.j 0x0 <this_section>
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM195 undef{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.j undef
 
 # ASM: qc.e.jal undef
-# OBJ: qc.e.jal 0x6
+# OBJ-NEXT: qc.e.jal 0x6 <this_section+0x6>
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM195 undef{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.jal undef
 
 
 # ASM: qc.e.j same_section
-# OBJ: qc.e.j 0x30
-# OBJ-NOT: R_RISCV
+# OBJ-NEXT: qc.e.j 0x30 <same_section>
 qc.e.j same_section
 
 # ASM: qc.e.jal same_section
-# OBJ: qc.e.jal 0x30
-# OBJ-NOT: R_RISCV
+# OBJ-NEXT: qc.e.jal 0x30 <same_section>
 qc.e.jal same_section
 
 # ASM: qc.e.j same_section_extern
-# OBJ: qc.e.j 0x18
+# OBJ-NEXT: qc.e.j 0x18 <this_section+0x18>
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM195 same_section_extern{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.j same_section_extern
 
 # ASM: qc.e.jal same_section_extern
-# OBJ: qc.e.jal 0x1e
+# OBJ-NEXT: qc.e.jal 0x1e <this_section+0x1e>
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM195 same_section_extern{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.jal same_section_extern
 
 
 # ASM: qc.e.j other_section
-# OBJ: qc.e.j 0x24
+# OBJ-NEXT: qc.e.j 0x24 <this_section+0x24>
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM195 other_section{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.j other_section
 
 # ASM: qc.e.jal other_section
-# OBJ: qc.e.jal 0x2a
+# OBJ-NEXT: qc.e.jal 0x2a <this_section+0x2a>
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM195 other_section{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.jal other_section
 
 
diff --git a/llvm/test/MC/RISCV/xqcili-relocations.s b/llvm/test/MC/RISCV/xqcili-relocations.s
@@ -23,54 +23,46 @@ this_section:
 # OBJ: qc.li a0, 0x0
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM192 undef{{$}}
-# OBJ-NOT: R_RISCV
 qc.li a0, %qc.abs20(undef)
 
 # ASM: qc.e.li s0, undef
-# OBJ: qc.e.li s0, 0x0
+# OBJ-NEXT: qc.e.li s0, 0x0
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM194 undef{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.li s0, undef
 
 
 # ASM: qc.li a1, %qc.abs20(0)
-# OBJ: qc.li a1, 0x0
-# OBJ-NOT: R_RISCV
+# OBJ-NEXT: qc.li a1, 0x0
 qc.li a1, %qc.abs20(abs_symbol)
 
 # ASM: qc.e.li s1, 0
-# OBJ: qc.e.li s1, 0x0
-# OBJ-NOT: R_RISCV
+# OBJ-NEXT: qc.e.li s1, 0x0
 qc.e.li s1, abs_symbol
 
 
 # ASM: qc.li a2, %qc.abs20(same_section)
-# OBJ: qc.li a2, 0x0
+# OBJ-NEXT: qc.li a2, 0x0
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM192 same_section{{$}}
-# OBJ-NOT: R_RISCV
 qc.li a2, %qc.abs20(same_section)
 
 # ASM: qc.e.li s2, same_section
-# OBJ: qc.e.li s2, 0x0
+# OBJ-NEXT: qc.e.li s2, 0x0
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM194 same_section{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.li s2, same_section
 
 # ASM: qc.li a3, %qc.abs20(other_section)
-# OBJ: qc.li a3, 0x0
+# OBJ-NEXT: qc.li a3, 0x0
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM192 other_section{{$}}
-# OBJ-NOT: R_RISCV
 qc.li a3, %qc.abs20(other_section)
 
 # ASM: qc.e.li s3, other_section
-# OBJ: qc.e.li s3, 0x0
+# OBJ-NEXT: qc.e.li s3, 0x0
 # OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}
 # OBJ-NEXT: R_RISCV_CUSTOM194 other_section{{$}}
-# OBJ-NOT: R_RISCV
 qc.e.li s3, other_section
 
 # ASM-LABEL: same_section:
