Skip to content

Commit 728902c

Browse files
committed
!fixup use worklist to remove all relevant dead instructions.
1 parent e32d818 commit 728902c

File tree

8 files changed

+8
-15
lines changed

8 files changed

+8
-15
lines changed

llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -177,9 +177,14 @@ SCEVExpander::findInsertPointAfter(Instruction *I,
177177
}
178178

179179
void SCEVExpander::eraseDeadInstructions(Value *Root) {
180-
for (Instruction *I : getAllInsertedInstructions()) {
181-
if (I == Root || !isInstructionTriviallyDead(I))
180+
SmallVector<Value *> WorkList;
181+
append_range(WorkList, getAllInsertedInstructions());
182+
while (!WorkList.empty()) {
183+
Instruction *I = dyn_cast<Instruction>(WorkList.pop_back_val());
184+
if (!I || I == Root || !isInsertedInstruction(I) ||
185+
!isInstructionTriviallyDead(I))
182186
continue;
187+
append_range(WorkList, I->operands());
183188
InsertedValues.erase(I);
184189
InsertedPostIncValues.erase(I);
185190
I->eraseFromParent();

llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -244,7 +244,6 @@ define void @f2(ptr noalias %A, ptr noalias %B, i32 %n) {
244244
; VF-TWO-CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -1
245245
; VF-TWO-CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
246246
; VF-TWO-CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
247-
; VF-TWO-CHECK-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP2]])
248247
; VF-TWO-CHECK-NEXT: [[TMP3:%.*]] = sub i32 [[TMP0]], [[TMP2]]
249248
; VF-TWO-CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[TMP3]], [[TMP0]]
250249
; VF-TWO-CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i64 [[TMP1]], 4294967295
@@ -369,7 +368,6 @@ define void @f2(ptr noalias %A, ptr noalias %B, i32 %n) {
369368
; VF-FOUR-CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -1
370369
; VF-FOUR-CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
371370
; VF-FOUR-CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
372-
; VF-FOUR-CHECK-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP2]])
373371
; VF-FOUR-CHECK-NEXT: [[TMP3:%.*]] = sub i32 [[TMP0]], [[TMP2]]
374372
; VF-FOUR-CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[TMP3]], [[TMP0]]
375373
; VF-FOUR-CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i64 [[TMP1]], 4294967295

llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -193,7 +193,6 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
193193
; RV64-NEXT: [[TMP3:%.*]] = add nsw i64 [[TMP0]], -1
194194
; RV64-NEXT: [[TMP4:%.*]] = add i32 [[N]], -1
195195
; RV64-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP3]] to i32
196-
; RV64-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP5]])
197196
; RV64-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[TMP5]]
198197
; RV64-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP6]], [[TMP4]]
199198
; RV64-NEXT: [[TMP9:%.*]] = icmp ugt i64 [[TMP3]], 4294967295
@@ -330,7 +329,6 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
330329
; RV64-UF2-NEXT: [[TMP3:%.*]] = add nsw i64 [[TMP0]], -1
331330
; RV64-UF2-NEXT: [[TMP4:%.*]] = add i32 [[N]], -1
332331
; RV64-UF2-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP3]] to i32
333-
; RV64-UF2-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP5]])
334332
; RV64-UF2-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[TMP5]]
335333
; RV64-UF2-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP6]], [[TMP4]]
336334
; RV64-UF2-NEXT: [[TMP9:%.*]] = icmp ugt i64 [[TMP3]], 4294967295
@@ -448,7 +446,6 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
448446
; RV64-NEXT: [[TMP3:%.*]] = add nsw i64 [[TMP0]], -1
449447
; RV64-NEXT: [[TMP4:%.*]] = add i32 [[N]], -1
450448
; RV64-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP3]] to i32
451-
; RV64-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP5]])
452449
; RV64-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[TMP5]]
453450
; RV64-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP6]], [[TMP4]]
454451
; RV64-NEXT: [[TMP9:%.*]] = icmp ugt i64 [[TMP3]], 4294967295
@@ -585,7 +582,6 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
585582
; RV64-UF2-NEXT: [[TMP3:%.*]] = add nsw i64 [[TMP0]], -1
586583
; RV64-UF2-NEXT: [[TMP4:%.*]] = add i32 [[N]], -1
587584
; RV64-UF2-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP3]] to i32
588-
; RV64-UF2-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP5]])
589585
; RV64-UF2-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[TMP5]]
590586
; RV64-UF2-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP6]], [[TMP4]]
591587
; RV64-UF2-NEXT: [[TMP9:%.*]] = icmp ugt i64 [[TMP3]], 4294967295

llvm/test/Transforms/LoopVectorize/X86/pr35432.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -38,15 +38,14 @@ define i32 @main(ptr %ptr) {
3838
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1
3939
; CHECK-NEXT: [[UMIN1:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP2]])
4040
; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[TMP3]], [[UMIN1]]
41-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP4]], 36
41+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP4]], 24
4242
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
4343
; CHECK: vector.scevcheck:
4444
; CHECK-NEXT: [[TMP5:%.*]] = add i8 [[CONV3]], -1
4545
; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32
4646
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP6]])
4747
; CHECK-NEXT: [[TMP7:%.*]] = sub i32 [[TMP6]], [[UMIN]]
4848
; CHECK-NEXT: [[TMP8:%.*]] = trunc i32 [[TMP7]] to i8
49-
; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 1, i8 [[TMP8]])
5049
; CHECK-NEXT: [[TMP9:%.*]] = sub i8 [[TMP5]], [[TMP8]]
5150
; CHECK-NEXT: [[TMP10:%.*]] = icmp ugt i8 [[TMP9]], [[TMP5]]
5251
; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt i32 [[TMP7]], 255

llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -155,7 +155,6 @@ define dso_local signext i32 @f2(ptr noalias %A, ptr noalias %B, i32 signext %n)
155155
; CHECK: [[VECTOR_SCEVCHECK]]:
156156
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[WIDE_TRIP_COUNT]], -1
157157
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
158-
; CHECK-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP2]])
159158
; CHECK-NEXT: [[TMP3:%.*]] = sub i32 [[TMP0]], [[TMP2]]
160159
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[TMP3]], [[TMP0]]
161160
; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i64 [[TMP1]], 4294967295

llvm/test/Transforms/LoopVectorize/pr34681.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,6 @@ define i32 @foo2(i16 zeroext %N, ptr nocapture readnone %A, ptr nocapture readon
149149
; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i32, i1 } [[MUL1]], 0
150150
; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i32, i1 } [[MUL1]], 1
151151
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[J]], [[MUL_RESULT]]
152-
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[J]], [[MUL_RESULT]]
153152
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP1]], [[J]]
154153
; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[MUL_OVERFLOW]]
155154
; CHECK-NEXT: br i1 [[TMP4]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]

llvm/test/Transforms/LoopVectorize/pr37248.ll

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,6 @@ define void @f1(ptr noalias %b, i1 %c, i32 %start) {
2626
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[START]], [[SMIN]]
2727
; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[START]] to i16
2828
; CHECK-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP2]] to i16
29-
; CHECK-NEXT: [[MUL:%.*]] = call { i16, i1 } @llvm.umul.with.overflow.i16(i16 1, i16 [[TMP4]])
3029
; CHECK-NEXT: [[TMP5:%.*]] = sub i16 [[TMP3]], [[TMP4]]
3130
; CHECK-NEXT: [[TMP6:%.*]] = icmp sgt i16 [[TMP5]], [[TMP3]]
3231
; CHECK-NEXT: [[TMP8:%.*]] = icmp ugt i32 [[TMP2]], 65535
@@ -105,7 +104,6 @@ define void @f2(ptr noalias %b, i1 %c, i32 %start) {
105104
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[START]], [[SMIN]]
106105
; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[START]] to i16
107106
; CHECK-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP2]] to i16
108-
; CHECK-NEXT: [[MUL:%.*]] = call { i16, i1 } @llvm.umul.with.overflow.i16(i16 1, i16 [[TMP4]])
109107
; CHECK-NEXT: [[TMP5:%.*]] = sub i16 [[TMP3]], [[TMP4]]
110108
; CHECK-NEXT: [[TMP6:%.*]] = icmp sgt i16 [[TMP5]], [[TMP3]]
111109
; CHECK-NEXT: [[TMP8:%.*]] = icmp ugt i32 [[TMP2]], 65535

llvm/test/Transforms/LoopVectorize/reverse_induction.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,6 @@ define i32 @reverse_induction_i16(i16 %startval, ptr %ptr) {
149149
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]]
150150
; CHECK: [[VECTOR_SCEVCHECK]]:
151151
; CHECK-NEXT: [[TMP0:%.*]] = add i16 [[STARTVAL]], -1
152-
; CHECK-NEXT: [[MUL:%.*]] = call { i16, i1 } @llvm.umul.with.overflow.i16(i16 1, i16 1023)
153152
; CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], 1023
154153
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i16 [[TMP1]], [[TMP0]]
155154
; CHECK-NEXT: br i1 [[TMP2]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]

0 commit comments

Comments
 (0)