Removed Latency = 1

mikhailramalho · mikhailramalho · commit 7297de6156a8 · 2025-12-03T12:22:36.000-03:00
Signed-off-by: Mikhail R. Gadelha &lt;mikhail@igalia.com&gt;
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
@@ -408,7 +408,7 @@ foreach mx = SchedMxList in {
   }
 
   // Mask loads and stores
-  let Latency = 1, ReleaseAtCycles = [2] in {
+  let ReleaseAtCycles = [2] in {
     defm "" : LMULWriteResMX<"WriteVLDM", [SMX60_VLS], mx, IsWorstCase>;
   }
   let Latency = 2, ReleaseAtCycles = [2] in {

Original file line number	Diff line number	Diff line change
`@@ -408,7 +408,7 @@ foreach mx = SchedMxList in {`
`408`	`408`	`}`
`409`	`409`
`410`	`410`	`// Mask loads and stores`
`411`		`- let Latency = 1, ReleaseAtCycles = [2] in {`
	`411`	`+ let ReleaseAtCycles = [2] in {`
`412`	`412`	`defm "" : LMULWriteResMX<"WriteVLDM", [SMX60_VLS], mx, IsWorstCase>;`
`413`	`413`	`}`
`414`	`414`	`let Latency = 2, ReleaseAtCycles = [2] in {`