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[AMDGPU] Fix layering violations in AMDGPUMCExpr.cpp. NFC (#168242)
AMDGPUMCExpr lives in the MC layer it should not depend on Function.h or GCNSubtarget.h Move the function that needed GCNSubtarget to the one file that called it.
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3 files changed

+28
-33
lines changed

3 files changed

+28
-33
lines changed

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

Lines changed: 28 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -358,6 +358,32 @@ bool AMDGPUAsmPrinter::doInitialization(Module &M) {
358358
return AsmPrinter::doInitialization(M);
359359
}
360360

361+
/// Mimics GCNSubtarget::computeOccupancy for MCExpr.
362+
///
363+
/// Remove dependency on GCNSubtarget and depend only only the necessary values
364+
/// for said occupancy computation. Should match computeOccupancy implementation
365+
/// without passing \p STM on.
366+
const AMDGPUMCExpr *createOccupancy(unsigned InitOcc, const MCExpr *NumSGPRs,
367+
const MCExpr *NumVGPRs,
368+
unsigned DynamicVGPRBlockSize,
369+
const GCNSubtarget &STM, MCContext &Ctx) {
370+
unsigned MaxWaves = IsaInfo::getMaxWavesPerEU(&STM);
371+
unsigned Granule = IsaInfo::getVGPRAllocGranule(&STM, DynamicVGPRBlockSize);
372+
unsigned TargetTotalNumVGPRs = IsaInfo::getTotalNumVGPRs(&STM);
373+
unsigned Generation = STM.getGeneration();
374+
375+
auto CreateExpr = [&Ctx](unsigned Value) {
376+
return MCConstantExpr::create(Value, Ctx);
377+
};
378+
379+
return AMDGPUMCExpr::create(AMDGPUMCExpr::AGVK_Occupancy,
380+
{CreateExpr(MaxWaves), CreateExpr(Granule),
381+
CreateExpr(TargetTotalNumVGPRs),
382+
CreateExpr(Generation), CreateExpr(InitOcc),
383+
NumSGPRs, NumVGPRs},
384+
Ctx);
385+
}
386+
361387
void AMDGPUAsmPrinter::validateMCResourceInfo(Function &F) {
362388
if (F.isDeclaration() || !AMDGPU::isModuleEntryFunctionCC(F.getCallingConv()))
363389
return;
@@ -459,7 +485,7 @@ void AMDGPUAsmPrinter::validateMCResourceInfo(Function &F) {
459485
MaxWaves, MFI.getDynamicVGPRBlockSize())});
460486
uint64_t NumSGPRsForWavesPerEU = std::max(
461487
{NumSgpr, (uint64_t)1, (uint64_t)STM.getMinNumSGPRs(MaxWaves)});
462-
const MCExpr *OccupancyExpr = AMDGPUMCExpr::createOccupancy(
488+
const MCExpr *OccupancyExpr = createOccupancy(
463489
STM.getOccupancyWithWorkGroupSizes(*MF).second,
464490
MCConstantExpr::create(NumSGPRsForWavesPerEU, OutContext),
465491
MCConstantExpr::create(NumVGPRsForWavesPerEU, OutContext),
@@ -1270,7 +1296,7 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
12701296
amdhsa::COMPUTE_PGM_RSRC3_GFX125_NAMED_BAR_CNT,
12711297
amdhsa::COMPUTE_PGM_RSRC3_GFX125_NAMED_BAR_CNT_SHIFT);
12721298

1273-
ProgInfo.Occupancy = AMDGPUMCExpr::createOccupancy(
1299+
ProgInfo.Occupancy = createOccupancy(
12741300
STM.computeOccupancy(F, ProgInfo.LDSSize).second,
12751301
ProgInfo.NumSGPRsForWavesPerEU, ProgInfo.NumVGPRsForWavesPerEU,
12761302
MFI->getDynamicVGPRBlockSize(), STM, Ctx);

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp

Lines changed: 0 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -7,9 +7,7 @@
77
//===----------------------------------------------------------------------===//
88

99
#include "AMDGPUMCExpr.h"
10-
#include "GCNSubtarget.h"
1110
#include "Utils/AMDGPUBaseInfo.h"
12-
#include "llvm/IR/Function.h"
1311
#include "llvm/MC/MCAsmInfo.h"
1412
#include "llvm/MC/MCAssembler.h"
1513
#include "llvm/MC/MCContext.h"
@@ -317,30 +315,6 @@ const AMDGPUMCExpr *AMDGPUMCExpr::createTotalNumVGPR(const MCExpr *NumAGPR,
317315
return create(AGVK_TotalNumVGPRs, {NumAGPR, NumVGPR}, Ctx);
318316
}
319317

320-
/// Mimics GCNSubtarget::computeOccupancy for MCExpr.
321-
///
322-
/// Remove dependency on GCNSubtarget and depend only only the necessary values
323-
/// for said occupancy computation. Should match computeOccupancy implementation
324-
/// without passing \p STM on.
325-
const AMDGPUMCExpr *AMDGPUMCExpr::createOccupancy(
326-
unsigned InitOcc, const MCExpr *NumSGPRs, const MCExpr *NumVGPRs,
327-
unsigned DynamicVGPRBlockSize, const GCNSubtarget &STM, MCContext &Ctx) {
328-
unsigned MaxWaves = IsaInfo::getMaxWavesPerEU(&STM);
329-
unsigned Granule = IsaInfo::getVGPRAllocGranule(&STM, DynamicVGPRBlockSize);
330-
unsigned TargetTotalNumVGPRs = IsaInfo::getTotalNumVGPRs(&STM);
331-
unsigned Generation = STM.getGeneration();
332-
333-
auto CreateExpr = [&Ctx](unsigned Value) {
334-
return MCConstantExpr::create(Value, Ctx);
335-
};
336-
337-
return create(AGVK_Occupancy,
338-
{CreateExpr(MaxWaves), CreateExpr(Granule),
339-
CreateExpr(TargetTotalNumVGPRs), CreateExpr(Generation),
340-
CreateExpr(InitOcc), NumSGPRs, NumVGPRs},
341-
Ctx);
342-
}
343-
344318
const AMDGPUMCExpr *AMDGPUMCExpr::createLit(LitModifier Lit, int64_t Value,
345319
MCContext &Ctx) {
346320
assert(Lit == LitModifier::Lit || Lit == LitModifier::Lit64);

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -98,11 +98,6 @@ class AMDGPUMCExpr : public MCTargetExpr {
9898
return create(VariantKind::AGVK_AlignTo, {Value, Align}, Ctx);
9999
}
100100

101-
static const AMDGPUMCExpr *
102-
createOccupancy(unsigned InitOcc, const MCExpr *NumSGPRs,
103-
const MCExpr *NumVGPRs, unsigned DynamicVGPRBlockSize,
104-
const GCNSubtarget &STM, MCContext &Ctx);
105-
106101
static const AMDGPUMCExpr *createLit(LitModifier Lit, int64_t Value,
107102
MCContext &Ctx);
108103

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