We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent ef93b18 commit 739274bCopy full SHA for 739274b
mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
@@ -189,6 +189,8 @@ void mlir::amdgpu::populateAmdgpuEmulateAtomicsPatterns(
189
} else {
190
target.addIllegalOp<RawBufferAtomicFmaxOp>();
191
}
192
+ // TODO: refactor this to avoid hardcoding ISA version:
193
+ // https://github.com/llvm/llvm-project/issues/129206
194
// gfx950 has bf16 atomics
195
if (chipset < Chipset(9, 5, 0)) {
196
target.addDynamicallyLegalOp<RawBufferAtomicFaddOp>(
0 commit comments