1+ //===-- RISCVInstrInfoXSMTVDot.td - SpacemiT Vector Dot Product ----*- tablegen -*-===//
2+ //
3+ // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+ // See https://llvm.org/LICENSE.txt for license information.
5+ // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+ //
7+ //===----------------------------------------------------------------------===//
8+ //
9+ // This file describes the xsmtvdot vendor extensions defined by SpacemiT.
10+ //
11+ //===----------------------------------------------------------------------===//
12+
13+ //===----------------------------------------------------------------------===//
14+ // Operand definitions.
15+ //===----------------------------------------------------------------------===//
16+
17+ class SMTVDotOpcode<bits<7> val> {
18+ bits<7> Value = val;
19+ }
20+
21+ class SMTVEncoding2<bits<2> val> {
22+ bits<2> Value = val;
23+ }
24+
25+ def OPMMA : SMTVDotOpcode<0b1110001>;
26+ def OPMMA_SLIDE : SMTVDotOpcode<0b1110011>;
27+
28+ //===----------------------------------------------------------------------===//
29+ // Vector Dot-Product Sign Encoding
30+ // Defines the signed/unsigned mixing modes for vector dot-product operations.
31+ // Encoding format: [1:0] bits
32+ // 00: UU (Unsigned x Unsigned)
33+ // 01: US (Unsigned x Signed)
34+ // 10: SU (Signed x Unsigned)
35+ // 11: SS (Signed x Signed)
36+ //===----------------------------------------------------------------------===//
37+ def SMT_VDot_UU : SMTVEncoding2<0b00>;
38+ def SMT_VDot_US : SMTVEncoding2<0b01>;
39+ def SMT_VDot_SU : SMTVEncoding2<0b10>;
40+ def SMT_VDot_SS : SMTVEncoding2<0b11>;
41+
42+ //===----------------------------------------------------------------------===//
43+ // Vector Dot-Product Sliding Window Modes
44+ // Encoding format: [1:0] bits
45+ // 00: Slide1 (1-element sliding stride)
46+ // 01: Slide2 (2-element sliding stride)
47+ // 10: Slide3 (3-element sliding stride)
48+ // 11: Reserved
49+ //
50+ // Used in sliding-window dot-product operations:
51+ // vd = vs1 • vs2.slide{1|2|3} // • = dot product
52+ //===----------------------------------------------------------------------===//
53+ def SMT_VDot_Slide1 : SMTVEncoding2<0b00>;
54+ def SMT_VDot_Slide2 : SMTVEncoding2<0b01>;
55+ def SMT_VDot_Slide3 : SMTVEncoding2<0b10>;
56+
57+ //===----------------------------------------------------------------------===//
58+ // Instruction formats
59+ //===----------------------------------------------------------------------===//
60+
61+ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
62+ // Base vector dot product (no slide) format.
63+ class RVInstVDot<bits<2> sign, string opcodestr, string argstr>
64+ : RVInst<(outs VR:$vd), (ins VR:$vs1, VR:$vs2), opcodestr, argstr, [], InstFormatR> {
65+ bits<5> vd;
66+ bits<5> vs1;
67+ bits<5> vs2;
68+
69+ let Inst{31-25} = OPMMA.Value;
70+ let Inst{24-20} = vs2;
71+ let Inst{19-15} = vs1;
72+ let Inst{14} = 0b0;
73+ let Inst{13-12} = sign;
74+ let Inst{11-8} = vd{4-1};
75+ let Inst{7} = 0b0;
76+ let Inst{6-0} = OPC_CUSTOM_1.Value;
77+ }
78+
79+ // Sliding-window vector dot product format.
80+ class RVInstVDotSlide<bits<2>funct2, bits<2> sign, string opcodestr, string argstr>
81+ : RVInst<(outs VR:$vd), (ins VR:$vs1, VR:$vs2), opcodestr, argstr, [], InstFormatR> {
82+ bits<5> vd;
83+ bits<5> vs1;
84+ bits<5> vs2;
85+
86+ let Inst{31-25} = OPMMA_SLIDE.Value;
87+ let Inst{24-20} = vs2;
88+ let Inst{19-16} = vs1{4-1};
89+ let Inst{15-14} = funct2;
90+ let Inst{13-12} = sign;
91+ let Inst{11-8} = vd{4-1};
92+ let Inst{7} = 0b0;
93+ let Inst{6-0} = OPC_CUSTOM_1.Value;
94+ }
95+ }
96+
97+ //===----------------------------------------------------------------------===//
98+ // Instructions
99+ //===----------------------------------------------------------------------===//
100+
101+ let DecoderNamespace = "XSMT" in {
102+
103+ let Predicates = [HasVendorXSMTVDot] in {
104+ // Base vector dot product (no slide) instructions
105+ // NOTE: Destination registers (vd) MUST be even-numbered (v0, v2, ..., v30)
106+ // due to hardware alignment constraints. Using odd registers may cause undefined behavior.
107+ // TODO: Enforce even-numbered vd.
108+ def VMADOT : RVInstVDot<SMT_VDot_SS.Value{1-0}, "smt.vmadot", "$vd, $vs1, $vs2">;
109+ def VMADOTU : RVInstVDot<SMT_VDot_UU.Value{1-0}, "smt.vmadotu", "$vd, $vs1, $vs2">;
110+ def VMADOTSU : RVInstVDot<SMT_VDot_SU.Value{1-0}, "smt.vmadotsu", "$vd, $vs1, $vs2">;
111+ def VMADOTUU : RVInstVDot<SMT_VDot_US.Value{1-0}, "smt.vmadotus", "$vd, $vs1, $vs2">;
112+
113+ //===----------------------------------------------------------------------===//
114+ // Sliding-window Vector Dot Product Instructions
115+ //
116+ // The numeric suffix (1, 2, 3) specifies the stride of the sliding window:
117+ // 1: Window slides by 1 element per operation
118+ // 2: Window slides by 2 elements per operation
119+ // 3: Window slides by 3 elements per operation
120+ //
121+ // These instructions compute dot products with overlapping operand windows
122+ // where the window position increments by <N> elements between computations.
123+ //===----------------------------------------------------------------------===//
124+ // NOTE: Destination registers (vd) and first source register (vs1) MUST be
125+ // even-numbered (v0, v2, ..., v30) due to hardware alignment constraints.
126+ // Using odd registers may cause undefined behavior.
127+ // TODO: Enforce even-numbered vd.
128+ def VMADOT1 : RVInstVDotSlide<SMT_VDot_Slide1.Value, SMT_VDot_SS.Value{1-0}, "smt.vmadot1", "$vd, $vs1, $vs2">;
129+ def VMADOT1U : RVInstVDotSlide<SMT_VDot_Slide1.Value, SMT_VDot_UU.Value{1-0}, "smt.vmadot1u", "$vd, $vs1, $vs2">;
130+ def VMADOT1SU : RVInstVDotSlide<SMT_VDot_Slide1.Value, SMT_VDot_SU.Value{1-0}, "smt.vmadot1su", "$vd, $vs1, $vs2">;
131+ def VMADOT1UU : RVInstVDotSlide<SMT_VDot_Slide1.Value, SMT_VDot_US.Value{1-0}, "smt.vmadot1us", "$vd, $vs1, $vs2">;
132+ def VMADOT2 : RVInstVDotSlide<SMT_VDot_Slide2.Value, SMT_VDot_SS.Value{1-0}, "smt.vmadot2", "$vd, $vs1, $vs2">;
133+ def VMADOT2U : RVInstVDotSlide<SMT_VDot_Slide2.Value, SMT_VDot_UU.Value{1-0}, "smt.vmadot2u", "$vd, $vs1, $vs2">;
134+ def VMADOT2SU : RVInstVDotSlide<SMT_VDot_Slide2.Value, SMT_VDot_SU.Value{1-0}, "smt.vmadot2su", "$vd, $vs1, $vs2">;
135+ def VMADOT2UU : RVInstVDotSlide<SMT_VDot_Slide2.Value, SMT_VDot_US.Value{1-0}, "smt.vmadot2us", "$vd, $vs1, $vs2">;
136+ def VMADOT3 : RVInstVDotSlide<SMT_VDot_Slide3.Value, SMT_VDot_SS.Value{1-0}, "smt.vmadot3", "$vd, $vs1, $vs2">;
137+ def VMADOT3U : RVInstVDotSlide<SMT_VDot_Slide3.Value, SMT_VDot_UU.Value{1-0}, "smt.vmadot3u", "$vd, $vs1, $vs2">;
138+ def VMADOT3SU : RVInstVDotSlide<SMT_VDot_Slide3.Value, SMT_VDot_SU.Value{1-0}, "smt.vmadot3su", "$vd, $vs1, $vs2">;
139+ def VMADOT3UU : RVInstVDotSlide<SMT_VDot_Slide3.Value, SMT_VDot_US.Value{1-0}, "smt.vmadot3us", "$vd, $vs1, $vs2">;
140+ }
141+ }
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