Updated according to review

Author: KungFuDonkey

clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h

@@ -2502,6 +2502,9 @@ __attribute__((convergent)) double4 WaveReadLaneAt(double4, uint32_t);
 // WaveActiveBitOr builtins
 //===----------------------------------------------------------------------===//
 
+// \brief Returns the value of the expression for the given lane index within
+// the specified wave.
+
 _HLSL_AVAILABILITY(shadermodel, 6.0)
 _HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_bit_or)
 __attribute__((convergent)) uint WaveActiveBitOr(uint);

clang/lib/Sema/SemaHLSL.cpp

@@ -3215,22 +3215,22 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
     if (SemaRef.checkArgCount(TheCall, 1))
       return true;
 
-    // Ensure input expr type is a scalar/vector and the same as the return type
-    if (CheckAnyScalarOrVector(&SemaRef, TheCall, 0))
-      return true;
     if (CheckWaveActive(&SemaRef, TheCall))
       return true;
 
-    // Ensure expression parameter type can be interpreted as a uint
+    // Ensure the expr type is interpretable as a uint or vector<uint>
     ExprResult Expr = TheCall->getArg(0);
     QualType ArgTyExpr = Expr.get()->getType();
-    if (!ArgTyExpr->isIntegerType()) {
+    auto *VTy = ArgTyExpr->getAs<VectorType>();
+    if (!(ArgTyExpr->isIntegerType() ||
+         (VTy && VTy->getElementType()->isIntegerType()))) {
       SemaRef.Diag(TheCall->getArg(0)->getBeginLoc(),
-                   diag::err_typecheck_convert_incompatible)
+                   diag::err_builtin_invalid_arg_type)
           << ArgTyExpr << SemaRef.Context.UnsignedIntTy << 1 << 0 << 0;
       return true;
     }
 
+    // Ensure input expr type is the same as the return type
     TheCall->setType(ArgTyExpr);
     break;
   }

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

@@ -2015,8 +2015,7 @@ bool SPIRVInstructionSelector::selectAnyOrAll(Register ResVReg,
   Register InputRegister = I.getOperand(2).getReg();
   SPIRVType *InputType = GR.getSPIRVTypeForVReg(InputRegister);
 
-  if (!InputType)
-    report_fatal_error("Input Type could not be determined.");
+  assert(InputType && "VReg has no type assigned");
 
   bool IsBoolTy = GR.isScalarOrVectorOfType(InputRegister, SPIRV::OpTypeBool);
   bool IsVectorTy = InputType->getOpcode() == SPIRV::OpTypeVector;

llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveBitOr.ll

@@ -1,5 +1,5 @@
 ; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-vulkan-unknown %s -o - | FileCheck %s
-; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-unknown %s -o - -filetype=obj | spirv-val %}
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan %s -o - -filetype=obj | spirv-val --target-env spv1.4 %}
 
 ; Test lowering to spir-v backend for various types and scalar/vector
 
@@ -27,4 +27,4 @@ entry:
   ret i64 %0
 }
 
-declare i64 @llvm.spv.wave.reduce.or.i64(i64)
+declare i64 @llvm.spv.wave.reduce.or.i64(i64)