clang-format; add lit.local.cfg; regenerate checks

Author: uyoyo0

llvm/lib/Transforms/Vectorize/VectorCombine.cpp

@@ -2018,9 +2018,10 @@ bool VectorCombine::scalarizeExtExtract(Instruction &I) {
     auto *Extract = cast<ExtractElementInst>(U);
     uint64_t Idx =
         cast<ConstantInt>(Extract->getIndexOperand())->getZExtValue();
-    uint64_t ShiftAmt = DL->isBigEndian()
-        ? (TotalBits - SrcEltSizeInBits - Idx * SrcEltSizeInBits)
-        : (Idx * SrcEltSizeInBits);
+    uint64_t ShiftAmt =
+        DL->isBigEndian()
+            ? (TotalBits - SrcEltSizeInBits - Idx * SrcEltSizeInBits)
+            : (Idx * SrcEltSizeInBits);
     Value *LShr = Builder.CreateLShr(ScalarV, ShiftAmt);
     Value *And = Builder.CreateAnd(LShr, Mask);
     U->replaceAllUsesWith(And);

llvm/test/Transforms/VectorCombine/AArch64/scalarize-ext-extract-endian.ll

@@ -1,23 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -passes='vector-combine,dce' -S -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=LE
 ; RUN: opt -passes='vector-combine,dce' -S -mtriple=aarch64_be-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=BE
 
 define i64 @g(<8 x i8> %v) {
+; LE-LABEL: @g(
+; LE-NEXT:    [[TMP1:%.*]] = freeze <8 x i8> [[V:%.*]]
+; LE-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to i64
+; LE-NEXT:    [[TMP3:%.*]] = lshr i64 [[TMP2]], 56
+; LE-NEXT:    [[TMP4:%.*]] = and i64 [[TMP2]], 255
+; LE-NEXT:    [[SUM:%.*]] = add i64 [[TMP4]], [[TMP3]]
+; LE-NEXT:    ret i64 [[SUM]]
+;
+; BE-LABEL: @g(
+; BE-NEXT:    [[TMP1:%.*]] = freeze <8 x i8> [[V:%.*]]
+; BE-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to i64
+; BE-NEXT:    [[TMP3:%.*]] = and i64 [[TMP2]], 255
+; BE-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP2]], 56
+; BE-NEXT:    [[SUM:%.*]] = add i64 [[TMP4]], [[TMP3]]
+; BE-NEXT:    ret i64 [[SUM]]
+;
   %z  = zext <8 x i8> %v to <8 x i64>
   %e0 = extractelement <8 x i64> %z, i32 0
   %e7 = extractelement <8 x i64> %z, i32 7
   %sum = add i64 %e0, %e7
   ret i64 %sum
 }
 
-; LE-LABEL: @g(
-; LE: bitcast <8 x i8> %{{.*}} to i64
-; LE: lshr i64 %{{.*}}, 56
-; LE: and i64 %{{.*}}, 255
-; LE-NOT: extractelement
 
-; BE-LABEL: @g(
-; BE: bitcast <8 x i8> %{{.*}} to i64
-; BE: and i64 %{{.*}}, 255
-; BE: lshr i64 %{{.*}}, 56
-; BE-NOT: extractelement
 

llvm/test/Transforms/VectorCombine/PowerPC/lit.local.cfg

@@ -0,0 +1,2 @@
+if 'PowerPC' not in config.root.targets:
+    config.unsupported = True

llvm/test/Transforms/VectorCombine/PowerPC/scalarize-ext-extract.ll

@@ -1,23 +1,19 @@
-; RUN: opt -passes='vector-combine,dce' -S -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=LE
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -passes='vector-combine,dce' -S -mtriple=powerpc64-ibm-aix-xcoff     %s -o - | FileCheck %s --check-prefix=BE
 
 define i64 @g(<8 x i8> %v) {
+; BE-LABEL: @g(
+; BE-NEXT:    [[TMP1:%.*]] = freeze <8 x i8> [[V:%.*]]
+; BE-NEXT:    [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to i64
+; BE-NEXT:    [[TMP3:%.*]] = and i64 [[TMP2]], 255
+; BE-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP2]], 56
+; BE-NEXT:    [[SUM:%.*]] = add i64 [[TMP4]], [[TMP3]]
+; BE-NEXT:    ret i64 [[SUM]]
+;
   %z  = zext <8 x i8> %v to <8 x i64>
   %e0 = extractelement <8 x i64> %z, i32 0
   %e7 = extractelement <8 x i64> %z, i32 7
   %sum = add i64 %e0, %e7
   ret i64 %sum
 }
 
-; LE-LABEL: @g(
-; LE: bitcast <8 x i8> %{{.*}} to i64
-; LE: lshr i64 %{{.*}}, 56
-; LE: and i64 %{{.*}}, 255
-; LE-NOT: extractelement
-
-; BE-LABEL: @g(
-; BE: bitcast <8 x i8> %{{.*}} to i64
-; BE: and i64 %{{.*}}, 255
-; BE: lshr i64 %{{.*}}, 56
-; BE-NOT: extractelement
-