[RISCV][CFI] enable CFIFixup pass in RISCVTargetMachine

daniilavdeev · daniilavdeev · commit 761a5979502b · 2024-10-16T10:55:21.000Z
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -177,6 +177,8 @@ RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,
 
   if (TT.isOSFuchsia() && !TT.isArch64Bit())
     report_fatal_error("Fuchsia is only supported for 64-bit");
+
+  setCFIFixup(true);
 }
 
 const RISCVSubtarget *

Original file line number	Diff line number	Diff line change
`@@ -177,6 +177,8 @@ RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,`
`177`	`177`
`178`	`178`	`if (TT.isOSFuchsia() && !TT.isArch64Bit())`
`179`	`179`	`report_fatal_error("Fuchsia is only supported for 64-bit");`
	`180`	`+`
	`181`	`+ setCFIFixup(true);`
`180`	`182`	`}`
`181`	`183`
`182`	`184`	`const RISCVSubtarget *`