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1 | | -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
2 | | -; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefix=GCN %s |
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s |
3 | 3 |
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4 | 4 | ; Verify that the debug locations in this function are correct, in particular |
5 | 5 | ; that the location for %cast doesn't appear in the block of %lab. |
6 | 6 |
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7 | 7 | define void @_Z12lane_pc_testj() #0 !dbg !9 { |
8 | | -; GCN-LABEL: _Z12lane_pc_testj: |
9 | | -; GCN: .Lfunc_begin0: |
10 | | -; GCN-NEXT: .file 0 "/" "t.cpp" |
11 | | -; GCN-NEXT: .loc 0 3 0 ; t.cpp:3:0 |
12 | | -; GCN-NEXT: .cfi_sections .debug_frame |
13 | | -; GCN-NEXT: .cfi_startproc |
14 | | -; GCN-NEXT: ; %bb.0: |
15 | | -; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
16 | | -; GCN-NEXT: ; %bb.1: ; %lab |
17 | | -; GCN-NEXT: .Ltmp0: |
18 | | -; GCN-NEXT: .loc 0 12 1 prologue_end ; t.cpp:12:1 |
19 | | -; GCN-NEXT: s_mov_b64 s[4:5], src_private_base |
20 | | -; GCN-NEXT: s_mov_b32 s6, 32 |
21 | | -; GCN-NEXT: s_lshr_b64 s[4:5], s[4:5], s6 |
22 | | -; GCN-NEXT: s_mov_b64 s[6:7], 0 |
23 | | -; GCN-NEXT: s_mov_b32 s5, -1 |
24 | | -; GCN-NEXT: s_lshr_b32 s8, s32, 5 |
25 | | -; GCN-NEXT: s_cmp_lg_u32 s8, s5 |
26 | | -; GCN-NEXT: s_cselect_b32 s5, s4, s7 |
27 | | -; GCN-NEXT: s_cselect_b32 s4, s8, s6 |
28 | | -; GCN-NEXT: v_mov_b32_e32 v2, 0 |
29 | | -; GCN-NEXT: .loc 0 13 1 ; t.cpp:13:1 |
30 | | -; GCN-NEXT: v_mov_b32_e32 v0, s4 |
31 | | -; GCN-NEXT: v_mov_b32_e32 v1, s5 |
32 | | -; GCN-NEXT: flat_store_dword v[0:1], v2 |
33 | | -; GCN-NEXT: v_mov_b32_e32 v2, 1 |
34 | | -; GCN-NEXT: .loc 0 14 1 ; t.cpp:14:1 |
35 | | -; GCN-NEXT: v_mov_b32_e32 v0, s4 |
36 | | -; GCN-NEXT: v_mov_b32_e32 v1, s5 |
37 | | -; GCN-NEXT: flat_store_dword v[0:1], v2 |
38 | | -; GCN-NEXT: s_waitcnt lgkmcnt(0) |
39 | | -; GCN-NEXT: s_setpc_b64 s[30:31] |
40 | | -; GCN-NEXT: .Ltmp1: |
| 8 | + ; GCN-LABEL: name: _Z12lane_pc_testj |
| 9 | + ; GCN: bb.0 (%ir-block.0): |
| 10 | + ; GCN-NEXT: successors: %bb.1(0x80000000) |
| 11 | + ; GCN-NEXT: {{ $}} |
| 12 | + ; GCN-NEXT: S_BRANCH %bb.1 |
| 13 | + ; GCN-NEXT: {{ $}} |
| 14 | + ; GCN-NEXT: bb.1.lab: |
| 15 | + ; GCN-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 $src_private_base, debug-location !12 |
| 16 | + ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32 |
| 17 | + ; GCN-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 killed [[S_MOV_B64_]], killed [[S_MOV_B32_]], implicit-def dead $scc, debug-location !12 |
| 18 | + ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY [[S_LSHR_B64_]].sub0, debug-location !12 |
| 19 | + ; GCN-NEXT: [[S_MOV_B64_1:%[0-9]+]]:sreg_64 = S_MOV_B64 0 |
| 20 | + ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[S_MOV_B64_1]].sub1, debug-location !12 |
| 21 | + ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1 |
| 22 | + ; GCN-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 %stack.0.alloc |
| 23 | + ; GCN-NEXT: S_CMP_LG_U32 [[S_MOV_B32_2]], killed [[S_MOV_B32_1]], implicit-def $scc, debug-location !12 |
| 24 | + ; GCN-NEXT: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 killed [[COPY]], killed [[COPY1]], implicit $scc, debug-location !12 |
| 25 | + ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[S_MOV_B64_1]].sub0, debug-location !12 |
| 26 | + ; GCN-NEXT: [[S_CSELECT_B32_1:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[S_MOV_B32_2]], killed [[COPY2]], implicit $scc, debug-location !12 |
| 27 | + ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE killed [[S_CSELECT_B32_1]], %subreg.sub0, killed [[S_CSELECT_B32_]], %subreg.sub1, debug-location !12 |
| 28 | + ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| 29 | + ; GCN-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]], debug-location !13 |
| 30 | + ; GCN-NEXT: FLAT_STORE_DWORD [[COPY3]], killed [[V_MOV_B32_e32_]], 0, 0, implicit $exec, implicit $flat_scr, debug-location !13 :: (store (s32) into %ir.cast) |
| 31 | + ; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec |
| 32 | + ; GCN-NEXT: [[COPY4:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]], debug-location !14 |
| 33 | + ; GCN-NEXT: FLAT_STORE_DWORD [[COPY4]], killed [[V_MOV_B32_e32_1]], 0, 0, implicit $exec, implicit $flat_scr, debug-location !14 :: (store (s32) into %ir.cast) |
| 34 | + ; GCN-NEXT: SI_RETURN |
41 | 35 | %alloc = alloca i32, align 4, addrspace(5) |
42 | 36 | %cast = addrspacecast ptr addrspace(5) %alloc to ptr, !dbg !12 |
43 | 37 | br label %lab |
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