fixup! add test case

Author: michaelmaitland

llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir

@@ -933,10 +933,20 @@ body: |
     %y:vr = PseudoVIOTA_M_M1 $noreg, %x, 1, 3 /* e8 */, 0
 ...
 ---
+name: viota_m_mask_scale_mask
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: viota_m_mask_scale_mask
+    ; CHECK: early-clobber %x:vr = PseudoVMSEQ_VV_M2 $noreg, $noreg, 1, 4 /* e16 */
+    ; CHECK-NEXT: early-clobber %y:vr = PseudoVIOTA_M_M1 $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */
+    %x:vr = PseudoVMSEQ_VV_M2 $noreg, $noreg, -1, 4 /* e16 */
+    %y:vr = PseudoVIOTA_M_M1 $noreg, %x, 1, 3 /* e8 */, 0
+...
+---
 name: viota_m_mask_incompatible_emul_from_sew
 body: |
   bb.0:
-    ; CHECK-LABEL: name: viota_m_mask_incompatible_eew
+    ; CHECK-LABEL: name: viota_m_mask_incompatible_emul_from_sew
     ; CHECK: %x:vr = PseudoVMAND_MM_B1 $noreg, $noreg, -1, 0 /* e8 */
     ; CHECK-NEXT: early-clobber %y:vr = PseudoVIOTA_M_M1 $noreg, %x, 1, 4 /* e16 */, 0 /* tu, mu */
     %x:vr = PseudoVMAND_MM_B1 $noreg, $noreg, -1, 0
@@ -946,7 +956,7 @@ body: |
 name: viota_m_mask_incompatible_emul_from_lmul
 body: |
   bb.0:
-    ; CHECK-LABEL: name: viota_m_mask_incompatible_emul
+    ; CHECK-LABEL: name: viota_m_mask_incompatible_emul_from_lmul
     ; CHECK: %x:vr = PseudoVMAND_MM_B1 $noreg, $noreg, -1, 0 /* e8 */
     ; CHECK-NEXT: early-clobber %y:vr = PseudoVIOTA_M_MF2 $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */
     %x:vr = PseudoVMAND_MM_B1 $noreg, $noreg, -1, 0