@@ -2097,16 +2097,41 @@ struct CheckFindSinglePrecisionFpuTest {
20972097
20982098TEST (TargetParserTest, checkFindSinglePrecisionFPU) {
20992099 CheckFindSinglePrecisionFpuTest tests[] = {
2100- {" cortex-r4f" , ARM::ArchKind::ARMV7R, " nofp.dp" , {}, ARM::FK_INVALID, ARM::FK_VFPV3XD},
2101- {" cortex-r7" , ARM::ArchKind::ARMV7R, " nofp.dp" , {}, ARM::FK_INVALID, ARM::FK_VFPV3XD_FP16},
2102- {" cortex-a7" , ARM::ArchKind::ARMV7A, " nofp.dp" , {}, ARM::FK_INVALID, ARM::FK_FPV4_SP_D16},
2103- {" cortex-r52" , ARM::ArchKind::ARMV8R, " nofp.dp" , {}, ARM::FK_INVALID, ARM::FK_FPV5_SP_D16},
2104- {" cortex-m55" , ARM::ArchKind::ARMV8_1MMainline, " nofp.dp" , {}, ARM::FK_INVALID, ARM::FK_FP_ARMV8_FULLFP16_SP_D16}
2105- };
2100+ {" cortex-r4f" ,
2101+ ARM::ArchKind::ARMV7R,
2102+ " nofp.dp" ,
2103+ {},
2104+ ARM::FK_INVALID,
2105+ ARM::FK_VFPV3XD},
2106+ {" cortex-r7" ,
2107+ ARM::ArchKind::ARMV7R,
2108+ " nofp.dp" ,
2109+ {},
2110+ ARM::FK_INVALID,
2111+ ARM::FK_VFPV3XD_FP16},
2112+ {" cortex-a7" ,
2113+ ARM::ArchKind::ARMV7A,
2114+ " nofp.dp" ,
2115+ {},
2116+ ARM::FK_INVALID,
2117+ ARM::FK_FPV4_SP_D16},
2118+ {" cortex-r52" ,
2119+ ARM::ArchKind::ARMV8R,
2120+ " nofp.dp" ,
2121+ {},
2122+ ARM::FK_INVALID,
2123+ ARM::FK_FPV5_SP_D16},
2124+ {" cortex-m55" ,
2125+ ARM::ArchKind::ARMV8_1MMainline,
2126+ " nofp.dp" ,
2127+ {},
2128+ ARM::FK_INVALID,
2129+ ARM::FK_FP_ARMV8_FULLFP16_SP_D16}};
21062130
21072131 for (auto X : tests) {
21082132 ARM::FPUKind FPU = X.Fpu ;
2109- EXPECT_TRUE (ARM::appendArchExtFeatures (X.Cpu , X.Arch , X.Archext , X.Features , FPU));
2133+ EXPECT_TRUE (
2134+ ARM::appendArchExtFeatures (X.Cpu , X.Arch , X.Archext , X.Features , FPU));
21102135 EXPECT_EQ (FPU, X.Output );
21112136 }
21122137}
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