Skip to content

Commit 78cdca5

Browse files
author
anoopkg6
committed
Eliminated combinedOR/combineXOR/combineAND altogether and collapsed into
combineLogicalOpCCMask.
1 parent 557113f commit 78cdca5

File tree

2 files changed

+44
-134
lines changed

2 files changed

+44
-134
lines changed

llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

Lines changed: 43 additions & 127 deletions
Original file line numberDiff line numberDiff line change
@@ -9182,15 +9182,18 @@ SystemZTargetLowering::getJumpConditionMergingParams(Instruction::BinaryOps Opc,
91829182
return {-1, -1, -1};
91839183
}
91849184

9185-
bool SystemZTargetLowering::combineLogicalOpCCMask(
9186-
SDValue &Op0, SDValue &Op1, unsigned Opcode, SDValue &TrueVal,
9187-
SDValue &FalseVal, int &CCValid, int &CCMask, SDValue &CCReg,
9188-
DAGCombinerInfo &DCI) const {
9185+
SDValue
9186+
SystemZTargetLowering::combineLogicalOpCCMask(SDNode *N,
9187+
DAGCombinerInfo &DCI) const {
91899188
SelectionDAG &DAG = DCI.DAG;
91909189

9190+
SDValue Op0 = N->getOperand(0), Op1 = N->getOperand(1);
91919191
auto *N0 = Op0.getNode(), *N1 = Op1.getNode();
91929192
if (!N0 || !N1)
9193-
return false;
9193+
return SDValue();
9194+
SDValue CCReg, TrueVal, FalseVal;
9195+
int CCMask, CCValid;
9196+
auto Opcode = N->getOpcode();
91949197
// Both Operands are SystemZISD::SELECT_CCMASK.
91959198
// And CCMask of both operands and they should point to the
91969199
// same CC and update TrueVal, FalseVal, CCReg, CCMask.
@@ -9201,18 +9204,18 @@ bool SystemZTargetLowering::combineLogicalOpCCMask(
92019204
auto *Op1CCValid = dyn_cast<ConstantSDNode>(N1->getOperand(2));
92029205
auto *Op1CCMask = dyn_cast<ConstantSDNode>(N1->getOperand(3));
92039206
if (!Op0CCValid || !Op1CCValid || !Op0CCMask || !Op1CCMask)
9204-
return false;
9207+
return SDValue();
92059208

92069209
int Op0CCValidVal = Op0CCValid->getZExtValue();
92079210
int Op1CCValidVal = Op1CCValid->getZExtValue();
92089211
if (Op0CCValidVal != Op1CCValidVal)
9209-
return false;
9212+
return SDValue();
92109213

92119214
// N0 and N1 should refer to same CC.
92129215
SDValue Op0CCReg = N0->getOperand(4), Op1CCReg = N1->getOperand(4);
92139216
auto *CCNode0 = Op0CCReg.getNode(), *CCNode1 = Op1CCReg.getNode();
92149217
if (!CCNode0 || !CCNode1 || CCNode0 != CCNode1)
9215-
return false;
9218+
return SDValue();
92169219

92179220
// Optimizing only the case where Op0TrueVal and Op1TrueVal are equal
92189221
// and at the same time Op0FalseVal and Op1FalseVal are also equal.
@@ -9221,17 +9224,17 @@ bool SystemZTargetLowering::combineLogicalOpCCMask(
92219224
auto *Op1TrueVal = dyn_cast<ConstantSDNode>(N1->getOperand(0));
92229225
auto *Op1FalseVal = dyn_cast<ConstantSDNode>(N1->getOperand(1));
92239226
if (!Op0TrueVal || !Op0FalseVal || !Op1TrueVal || !Op1FalseVal)
9224-
return false;
9227+
return SDValue();
92259228
if (Op0TrueVal->getZExtValue() != Op1TrueVal->getZExtValue() ||
92269229
Op0FalseVal->getZExtValue() != Op1FalseVal->getZExtValue())
9227-
return false;
9230+
return SDValue();
92289231

92299232
// Compute the effective CC mask for select.
92309233
int Op0CCMaskVal = Op0CCMask->getZExtValue();
92319234
int Op1CCMaskVal = Op1CCMask->getZExtValue();
92329235
if (Opcode == ISD::AND) {
92339236
if ((Op0CCMaskVal ^ Op0CCValidVal) & (Op1CCMaskVal ^ Op1CCValidVal))
9234-
return false;
9237+
return SDValue();
92359238
CCMask = Op0CCMaskVal & Op1CCMaskVal;
92369239
CCValid = Op0CCValidVal;
92379240
CCReg = Op0CCReg;
@@ -9241,10 +9244,9 @@ bool SystemZTargetLowering::combineLogicalOpCCMask(
92419244
SDLoc(N0), MVT::i32),
92429245
DAG.getTargetConstant(Op0FalseVal->getZExtValue(),
92439246
SDLoc(N0), MVT::i32));
9244-
return true;
92459247
} else if (Opcode == ISD::OR) {
92469248
if (Op0CCMaskVal & Op1CCMaskVal)
9247-
return false;
9249+
return SDValue();
92489250
CCMask = Op0CCMaskVal | Op1CCMaskVal;
92499251
CCValid = Op0CCValidVal;
92509252
CCReg = Op0CCReg;
@@ -9254,7 +9256,6 @@ bool SystemZTargetLowering::combineLogicalOpCCMask(
92549256
DAG.getTargetConstant(Op0FalseVal->getZExtValue(),
92559257
SDLoc(N0), MVT::i32));
92569258
FalseVal = N0->getOperand(1);
9257-
return true;
92589259
} else if (Opcode == ISD::XOR) {
92599260
CCMask = Op0CCMaskVal ^ Op1CCMaskVal;
92609261
CCValid = Op0CCValidVal;
@@ -9265,33 +9266,32 @@ bool SystemZTargetLowering::combineLogicalOpCCMask(
92659266
DAG.getTargetConstant(Op0FalseVal->getZExtValue(),
92669267
SDLoc(N0), MVT::i32));
92679268
FalseVal = N0->getOperand(1);
9268-
return true;
92699269
} else
9270-
return false;
9270+
return SDValue();
92719271
} else if (N0->getOpcode() == SystemZISD::SELECT_CCMASK) {
92729272
// N1: (SRL (IPM)). Operand 1 is cc-value.
92739273
if (N1->getOpcode() != ISD::SRL)
9274-
return false;
9274+
return SDValue();
92759275
auto *SRLCount = dyn_cast<ConstantSDNode>(N1->getOperand(1));
92769276
if (!SRLCount || SRLCount->getZExtValue() != SystemZ::IPM_CC)
9277-
return false;
9277+
return SDValue();
92789278
auto *IPM = N1->getOperand(0).getNode();
92799279
if (!IPM || IPM->getOpcode() != SystemZISD::IPM)
9280-
return false;
9280+
return SDValue();
92819281
SDValue Op1CCReg = IPM->getOperand(0);
92829282

92839283
// N0 and N1 should refer to same CC.
92849284
SDValue Op0CCReg = N0->getOperand(4);
92859285
auto *CCNode0 = Op0CCReg.getNode(), *CCNode1 = Op1CCReg.getNode();
92869286
if (!CCNode0 || !CCNode1 || CCNode0 != CCNode1)
9287-
return false;
9287+
return SDValue();
92889288
auto *Op0TrueVal = dyn_cast<ConstantSDNode>(N0->getOperand(0));
92899289
auto *Op0FalseVal = dyn_cast<ConstantSDNode>(N0->getOperand(1));
92909290
auto *Op0CCValid = dyn_cast<ConstantSDNode>(N0->getOperand(2));
92919291
auto *Op0CCMask = dyn_cast<ConstantSDNode>(N0->getOperand(3));
92929292
int Op0CCValidVal = Op0CCValid->getZExtValue();
92939293
if (!Op0TrueVal || !Op0FalseVal || !Op0CCMask || !Op0CCValid)
9294-
return false;
9294+
return SDValue();
92959295

92969296
const auto isOneBitSet = [](int Mask) {
92979297
return Mask && !(Mask & (Mask - 1));
@@ -9318,15 +9318,14 @@ bool SystemZTargetLowering::combineLogicalOpCCMask(
93189318
: (Opcode == ISD::AND) ? (CCVal & Op0TrueVal->getZExtValue())
93199319
: UINT_MAX;
93209320
if (TrueConst == UINT_MAX)
9321-
return false;
9321+
return SDValue();
93229322
CCMask = Mask;
93239323
CCValid = Op0CCValidVal;
93249324
CCReg = Op0CCReg;
93259325
TrueVal = DAG.getTargetConstant(TrueConst, SDLoc(N0), MVT::i32);
93269326
FalseVal = DAG.getNode(Opcode, SDLoc(N0), MVT::i32, Op1,
93279327
DAG.getTargetConstant(Op0FalseVal->getZExtValue(),
93289328
SDLoc(N0), MVT::i32));
9329-
return true;
93309329
} else if (isOneBitSet(Mask ^ 0xf)) {
93319330
// Only one clear bit.
93329331
// select_ccmask (Opcode (SRL IPM CC) (Op0TrueVal))
@@ -9341,115 +9340,34 @@ bool SystemZTargetLowering::combineLogicalOpCCMask(
93419340
: (Opcode == ISD::AND) ? (CCVal & Op0FalseVal->getZExtValue())
93429341
: UINT_MAX;
93439342
if (FalseConst == UINT_MAX)
9344-
return false;
9343+
return SDValue();
93459344
CCMask = Mask;
93469345
CCValid = Op0CCValidVal;
93479346
CCReg = Op0CCReg;
93489347
FalseVal = DAG.getTargetConstant(FalseConst, SDLoc(N0), MVT::i32);
9349-
return true;
93509348
} else
9351-
return false;
9352-
}
9353-
return false;
9354-
}
9355-
9356-
SDValue SystemZTargetLowering::combineAND(SDNode *N,
9357-
DAGCombinerInfo &DCI) const {
9358-
SelectionDAG &DAG = DCI.DAG;
9359-
9360-
SDValue AndOp0 = N->getOperand(0), AndOp1 = N->getOperand(1);
9361-
SDValue TrueVal, FalseVal, CCReg;
9362-
int CCValid, CCMask;
9363-
auto Opcode = N->getOpcode();
9364-
if (combineLogicalOpCCMask(AndOp0, AndOp1, Opcode, TrueVal, FalseVal, CCValid,
9365-
CCMask, CCReg, DCI)) {
9366-
// Check And's user's user if it it select_ccmask or br_ccmask, put it
9367-
// back to WorkList so that algortirm can start processing from outer
9368-
// select_ccmask/br_ccmask and combine with (icmp/tm (select_ccmask)).
9369-
for (SDUse &AndUse : N->uses()) {
9370-
auto *CCNode = AndUse.getUser();
9371-
if (CCNode && (CCNode->getOpcode() == SystemZISD::ICMP ||
9372-
CCNode->getOpcode() == SystemZISD::TM)) {
9373-
for (SDUse &SelectBrUse : CCNode->uses()) {
9374-
auto *SelectBr = SelectBrUse.getUser();
9375-
if (SelectBr && (SelectBr->getOpcode() == SystemZISD::SELECT_CCMASK ||
9376-
SelectBr->getOpcode() == SystemZISD::BR_CCMASK))
9377-
DCI.AddToWorklist(SelectBr);
9378-
}
9379-
}
9380-
}
9381-
return DAG.getNode(
9382-
SystemZISD::SELECT_CCMASK, SDLoc(N), N->getValueType(0), TrueVal,
9383-
FalseVal, DAG.getTargetConstant(CCValid, SDLoc(N), MVT::i32),
9384-
DAG.getTargetConstant(CCMask, SDLoc(N), MVT::i32), CCReg);
9385-
}
9386-
return SDValue();
9387-
}
9388-
9389-
SDValue SystemZTargetLowering::combineOR(SDNode *N,
9390-
DAGCombinerInfo &DCI) const {
9391-
SelectionDAG &DAG = DCI.DAG;
9392-
9393-
SDValue OrOp0 = N->getOperand(0), OrOp1 = N->getOperand(1);
9394-
SDValue TrueVal, FalseVal, CCReg;
9395-
auto Opcode = N->getOpcode();
9396-
int CCValid, CCMask;
9397-
if (combineLogicalOpCCMask(OrOp0, OrOp1, Opcode, TrueVal, FalseVal, CCValid,
9398-
CCMask, CCReg, DCI)) {
9399-
// Check Or's user's user if it it select_ccmask or br_ccmask, put it
9400-
// back to WorkList so that algortirm can start processing from outer
9401-
// select_ccmask/br_ccmask and combine with (icmp/tm (select_ccmask)).
9402-
for (SDUse &OrUse : N->uses()) {
9403-
auto *CCNode = OrUse.getUser();
9404-
if (CCNode && (CCNode->getOpcode() == SystemZISD::ICMP ||
9405-
CCNode->getOpcode() == SystemZISD::TM)) {
9406-
for (SDUse &SelectBrUse : CCNode->uses()) {
9407-
auto *SelectBr = SelectBrUse.getUser();
9408-
if (SelectBr && (SelectBr->getOpcode() == SystemZISD::SELECT_CCMASK ||
9409-
SelectBr->getOpcode() == SystemZISD::BR_CCMASK))
9410-
DCI.AddToWorklist(SelectBr);
9411-
}
9412-
}
9413-
}
9414-
return DAG.getNode(
9415-
SystemZISD::SELECT_CCMASK, SDLoc(N), N->getValueType(0), TrueVal,
9416-
FalseVal, DAG.getTargetConstant(CCValid, SDLoc(N), MVT::i32),
9417-
DAG.getTargetConstant(CCMask, SDLoc(N), MVT::i32), CCReg);
9418-
}
9419-
return SDValue();
9420-
}
9421-
9422-
SDValue SystemZTargetLowering::combineXOR(SDNode *N,
9423-
DAGCombinerInfo &DCI) const {
9424-
SelectionDAG &DAG = DCI.DAG;
9425-
9426-
SDValue XorOp0 = N->getOperand(0), XorOp1 = N->getOperand(1);
9427-
SDValue TrueVal, FalseVal, CCReg;
9428-
int CCValid, CCMask;
9429-
auto Opcode = N->getOpcode();
9430-
if (combineLogicalOpCCMask(XorOp0, XorOp1, Opcode, TrueVal, FalseVal, CCValid,
9431-
CCMask, CCReg, DCI)) {
9432-
// Check Xor's user's user if it it select_ccmask or br_ccmask, put it
9433-
// back to WorkList so that algortirm can start processing from outer
9434-
// select_ccmask/br_ccmask and combine with (icmp/tm (select_ccmask)).
9435-
for (SDUse &XorUse : N->uses()) {
9436-
auto *CCNode = XorUse.getUser();
9437-
if (CCNode && (CCNode->getOpcode() == SystemZISD::ICMP ||
9438-
CCNode->getOpcode() == SystemZISD::TM)) {
9439-
for (SDUse &SelectBrUse : CCNode->uses()) {
9440-
auto *SelectBr = SelectBrUse.getUser();
9441-
if (SelectBr && (SelectBr->getOpcode() == SystemZISD::SELECT_CCMASK ||
9442-
SelectBr->getOpcode() == SystemZISD::BR_CCMASK))
9443-
DCI.AddToWorklist(SelectBr);
9444-
}
9349+
return SDValue();
9350+
} else
9351+
return SDValue();
9352+
// Check N's user's user if it it select_ccmask or br_ccmask, put it
9353+
// back to WorkList so that algortirm can start processing from outer
9354+
// select_ccmask/br_ccmask and combine with (icmp/tm (select_ccmask)).
9355+
for (SDUse &NUse : N->uses()) {
9356+
auto *CCNode = NUse.getUser();
9357+
if (CCNode && (CCNode->getOpcode() == SystemZISD::ICMP ||
9358+
CCNode->getOpcode() == SystemZISD::TM)) {
9359+
for (SDUse &SelectBrUse : CCNode->uses()) {
9360+
auto *SelectBr = SelectBrUse.getUser();
9361+
if (SelectBr && (SelectBr->getOpcode() == SystemZISD::SELECT_CCMASK ||
9362+
SelectBr->getOpcode() == SystemZISD::BR_CCMASK))
9363+
DCI.AddToWorklist(SelectBr);
94459364
}
94469365
}
9447-
return DAG.getNode(
9448-
SystemZISD::SELECT_CCMASK, SDLoc(N), N->getValueType(0), TrueVal,
9449-
FalseVal, DAG.getTargetConstant(CCValid, SDLoc(N), MVT::i32),
9450-
DAG.getTargetConstant(CCMask, SDLoc(N), MVT::i32), CCReg);
94519366
}
9452-
return SDValue();
9367+
return DAG.getNode(SystemZISD::SELECT_CCMASK, SDLoc(N), N->getValueType(0),
9368+
TrueVal, FalseVal,
9369+
DAG.getTargetConstant(CCValid, SDLoc(N), MVT::i32),
9370+
DAG.getTargetConstant(CCMask, SDLoc(N), MVT::i32), CCReg);
94539371
}
94549372

94559373
SDValue SystemZTargetLowering::combineBR_CCMASK(SDNode *N,
@@ -9829,11 +9747,9 @@ SDValue SystemZTargetLowering::PerformDAGCombine(SDNode *N,
98299747
case ISD::INTRINSIC_W_CHAIN:
98309748
case ISD::INTRINSIC_VOID: return combineINTRINSIC(N, DCI);
98319749
case ISD::AND:
9832-
return combineAND(N, DCI);
98339750
case ISD::OR:
9834-
return combineOR(N, DCI);
98359751
case ISD::XOR:
9836-
return combineXOR(N, DCI);
9752+
return combineLogicalOpCCMask(N, DCI);
98379753
}
98389754

98399755
return SDValue();

llvm/lib/Target/SystemZ/SystemZISelLowering.h

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -802,13 +802,7 @@ class SystemZTargetLowering : public TargetLowering {
802802
SDValue combineMUL(SDNode *N, DAGCombinerInfo &DCI) const;
803803
SDValue combineIntDIVREM(SDNode *N, DAGCombinerInfo &DCI) const;
804804
SDValue combineINTRINSIC(SDNode *N, DAGCombinerInfo &DCI) const;
805-
SDValue combineAND(SDNode *N, DAGCombinerInfo &DCI) const;
806-
SDValue combineOR(SDNode *N, DAGCombinerInfo &DCI) const;
807-
SDValue combineXOR(SDNode *N, DAGCombinerInfo &DCI) const;
808-
bool combineLogicalOpCCMask(SDValue &Op0, SDValue &Op1, unsigned Opcode,
809-
SDValue &TrueVal, SDValue &FalseVal, int &CCValid,
810-
int &CCMask, SDValue &CCReg,
811-
DAGCombinerInfo &DCI) const;
805+
SDValue combineLogicalOpCCMask(SDNode *N, DAGCombinerInfo &DCI) const;
812806

813807
SDValue unwrapAddress(SDValue N) const override;
814808

0 commit comments

Comments
 (0)