correction about rank2

Author: amd-eochoalo

mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp

@@ -2659,24 +2659,8 @@ struct AMDGPUMakeDmaDescriptorLowering
 
     Value dgroup0 = this->getDGroup0(adaptor);
     Value dgroup1 = this->getDGroup1(op, adaptor, rewriter, loc, consts);
-    Value undefV4I32 = LLVM::UndefOp::create(rewriter, loc, v4i32);
-    Value dgroup2 = undefV4I32;
-    Value dgroup3 = undefV4I32;
-
-    if (op.getRank() == 2) {
-      Value nullConstant = createI32Constant(rewriter, loc, 0x7c);
-      dgroup2 = LLVM::InsertElementOp::create(rewriter, loc, dgroup2,
-                                              nullConstant, consts[0]);
-      dgroup2 = LLVM::InsertElementOp::create(rewriter, loc, dgroup2, consts[0],
-                                              consts[1]);
-      dgroup2 = LLVM::InsertElementOp::create(rewriter, loc, dgroup2, consts[0],
-                                              consts[2]);
-      dgroup2 = LLVM::InsertElementOp::create(rewriter, loc, dgroup2, consts[0],
-                                              consts[3]);
-      dgroup3 = dgroup2;
-    }
 
-    SmallVector<Value> results = {dgroup0, dgroup1, dgroup2, dgroup3};
+    SmallVector<Value> results = {dgroup0, dgroup1};
     rewriter.replaceOpWithMultiple(op, {results});
     return success();
   }

mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir

@@ -302,16 +302,7 @@ func.func @make_dma_descriptor(%base: !amdgpu.tdm_base<i32>) -> !amdgpu.tdm_desc
   // CHECK: %[[DGROUP1_6:.+]] = llvm.insertelement %[[SGPR6]], %[[DGROUP1_5]][%[[C6]] : i32]
   // CHECK: %[[DGROUP1:.+]] = llvm.insertelement %[[SGPR7]], %[[DGROUP1_6]][%[[C7]] : i32]
 
-  // CHECK-DAG: %[[V4I32:.+]] = llvm.mlir.undef : vector<4xi32>
-
-  // CHECK-DAG: %[[NULL:.+]] = llvm.mlir.constant(124 : i32)
-
-  // CHECK: %[[NULL_GROUP_0:.+]] = llvm.insertelement %[[NULL]], %[[V4I32]][%[[C0]] : i32]
-  // CHECK: %[[NULL_GROUP_1:.+]] = llvm.insertelement %[[C0]], %[[NULL_GROUP_0]][%[[C1]] : i32]
-  // CHECK: %[[NULL_GROUP_2:.+]] = llvm.insertelement %[[C0]], %[[NULL_GROUP_1]][%[[C2]] : i32]
-  // CHECK: %[[NULL_GROUP:.+]] = llvm.insertelement %[[C0]], %[[NULL_GROUP_2]][%[[C3]] : i32]
-
-  // CHECK: %[[DGROUPS:.+]] = builtin.unrealized_conversion_cast %[[DGROUP0]], %[[DGROUP1]], %[[NULL_GROUP]], %[[NULL_GROUP]] : vector<4xi32>, vector<8xi32>, vector<4xi32>, vector<4xi32> to !amdgpu.tdm_descriptor
+  // CHECK: %[[DGROUPS:.+]] = builtin.unrealized_conversion_cast %[[DGROUP0]], %[[DGROUP1]] : vector<4xi32>, vector<8xi32> to !amdgpu.tdm_descriptor
   %descriptor = amdgpu.make_dma_descriptor %base globalSize [128, 64] globalStride [64, 1] sharedSize [128, 64] : !amdgpu.tdm_base<i32> -> !amdgpu.tdm_descriptor
   func.return %descriptor : !amdgpu.tdm_descriptor
 }