address review comments

Author: kasuga-fj

llvm/test/Analysis/DependenceAnalysis/Invariant.ll

@@ -3,7 +3,9 @@
 ; RUN: | FileCheck %s
 
 ; XFAIL: *
-; Currently fails since delinearization doesn't work as expected.
+; Currently fails since delinearization doesn't work as expected, due to the
+; inconsistency in the estimated array sizes between `rr[i][j]` and `rr[j][j]`.
+; The latter is now regarded as an access to a 1D array.
 
 ; Test for a bug, which caused an assert when an invalid
 ; SCEVAddRecExpr is created in addToCoefficient.

llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll

@@ -1,6 +1,6 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
-; RUN: opt < %s -passes=loop-interchange \
-; RUN:     -verify-dom-info -verify-loop-info -verify-loop-lcssa -S 2>&1 | FileCheck %s
+; RUN: opt < %s -passes=loop-interchange -pass-remarks-missed='loop-interchange' -pass-remarks-output=%t \
+; RUN:     -verify-dom-info -verify-loop-info -verify-loop-lcssa
+; RUN: FileCheck --input-file=%t %s
 
 ;; The original code:
 ;;
@@ -17,49 +17,18 @@
 ;; We need to treat this as `*`, not `<`. See issue #123920 for details.
 ;; In conclusion, we must not interchange the loops.
 
+; CHECK:      --- !Missed
+; CHECK-NEXT: Pass:            loop-interchange
+; CHECK-NEXT: Name:            Dependence
+; CHECK-NEXT: Function:        f
+; CHECK-NEXT: Args:
+; CHECK-NEXT:   - String:          All loops have dependencies in all directions.
+; CHECK-NEXT: ...
+
+
 @a = dso_local global [16 x [16 x [16 x i32]]] zeroinitializer, align 4
 
 define dso_local void @f() {
-; CHECK-LABEL: define dso_local void @f() {
-; CHECK-NEXT:  [[ENTRY:.*]]:
-; CHECK-NEXT:    br label %[[FOR_COND1_PREHEADER:.*]]
-; CHECK:       [[FOR_COND1_PREHEADER]]:
-; CHECK-NEXT:    [[I_039:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[INC26:%.*]], %[[FOR_COND_CLEANUP3:.*]] ]
-; CHECK-NEXT:    [[SUB:%.*]] = add nuw nsw i32 [[I_039]], 3
-; CHECK-NEXT:    [[IDXPROM:%.*]] = zext nneg i32 [[SUB]] to i64
-; CHECK-NEXT:    [[MUL:%.*]] = shl nuw nsw i32 [[I_039]], 1
-; CHECK-NEXT:    [[IDXPROM13:%.*]] = zext nneg i32 [[MUL]] to i64
-; CHECK-NEXT:    br label %[[FOR_COND5_PREHEADER:.*]]
-; CHECK:       [[FOR_COND_CLEANUP:.*]]:
-; CHECK-NEXT:    ret void
-; CHECK:       [[FOR_COND5_PREHEADER]]:
-; CHECK-NEXT:    [[J_038:%.*]] = phi i32 [ 1, %[[FOR_COND1_PREHEADER]] ], [ [[INC23:%.*]], %[[FOR_COND_CLEANUP7:.*]] ]
-; CHECK-NEXT:    [[IDXPROM11:%.*]] = zext nneg i32 [[J_038]] to i64
-; CHECK-NEXT:    [[SUB18:%.*]] = add nsw i32 [[J_038]], -1
-; CHECK-NEXT:    [[IDXPROM19:%.*]] = sext i32 [[SUB18]] to i64
-; CHECK-NEXT:    br label %[[FOR_BODY8:.*]]
-; CHECK:       [[FOR_COND_CLEANUP3]]:
-; CHECK-NEXT:    [[INC26]] = add nuw nsw i32 [[I_039]], 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp samesign ult i32 [[I_039]], 3
-; CHECK-NEXT:    br i1 [[CMP]], label %[[FOR_COND1_PREHEADER]], label %[[FOR_COND_CLEANUP]]
-; CHECK:       [[FOR_COND_CLEANUP7]]:
-; CHECK-NEXT:    [[INC23]] = add nuw nsw i32 [[J_038]], 1
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign ult i32 [[J_038]], 7
-; CHECK-NEXT:    br i1 [[CMP2]], label %[[FOR_COND5_PREHEADER]], label %[[FOR_COND_CLEANUP3]]
-; CHECK:       [[FOR_BODY8]]:
-; CHECK-NEXT:    [[K_037:%.*]] = phi i32 [ 1, %[[FOR_COND5_PREHEADER]] ], [ [[ADD15:%.*]], %[[FOR_BODY8]] ]
-; CHECK-NEXT:    [[IDXPROM9:%.*]] = zext nneg i32 [[K_037]] to i64
-; CHECK-NEXT:    [[ARRAYIDX12:%.*]] = getelementptr inbounds nuw [16 x [16 x [16 x i32]]], ptr @a, i64 0, i64 [[IDXPROM]], i64 [[IDXPROM9]], i64 [[IDXPROM11]]
-; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX12]], align 4
-; CHECK-NEXT:    [[ADD15]] = add nuw nsw i32 [[K_037]], 1
-; CHECK-NEXT:    [[IDXPROM16:%.*]] = zext nneg i32 [[ADD15]] to i64
-; CHECK-NEXT:    [[ARRAYIDX20:%.*]] = getelementptr inbounds [16 x [16 x [16 x i32]]], ptr @a, i64 0, i64 [[IDXPROM13]], i64 [[IDXPROM16]], i64 [[IDXPROM19]]
-; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX20]], align 4
-; CHECK-NEXT:    [[SUB21:%.*]] = sub nsw i32 [[TMP1]], [[TMP0]]
-; CHECK-NEXT:    store i32 [[SUB21]], ptr [[ARRAYIDX20]], align 4
-; CHECK-NEXT:    [[CMP6:%.*]] = icmp samesign ult i32 [[K_037]], 7
-; CHECK-NEXT:    br i1 [[CMP6]], label %[[FOR_BODY8]], label %[[FOR_COND_CLEANUP7]]
-;
 entry:
   br label %for.cond1.preheader