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[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
Use "mem" just for full width loads and "m32bcst" / "m64bcst" for 32-bit (D) / 64-bit (Q) broadcasts. Fixes #143679 --------- Co-authored-by: Simon Pilgrim <[email protected]>
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‎llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp‎

Lines changed: 24 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -931,10 +931,18 @@ static bool printPTERNLOGComments(const MCInst *MI, raw_ostream &OS,
931931
// dest, src1, mask, src2, memory, tbl
932932
CASE_PTERNLOG(PTERNLOGD, m)
933933
CASE_PTERNLOG(PTERNLOGQ, m)
934+
Src2Idx = NumOperands - 7;
935+
Src3Idx = -1;
936+
break;
937+
934938
CASE_PTERNLOG(PTERNLOGD, mb)
939+
Src2Idx = NumOperands - 7;
940+
Src3Idx = -2;
941+
break;
942+
935943
CASE_PTERNLOG(PTERNLOGQ, mb)
936944
Src2Idx = NumOperands - 7;
937-
Src3Idx = -1;
945+
Src3Idx = -3;
938946
break;
939947

940948
default:
@@ -943,8 +951,21 @@ static bool printPTERNLOGComments(const MCInst *MI, raw_ostream &OS,
943951
StringRef DestName = getRegName(MI->getOperand(0).getReg());
944952
StringRef Src1Name = getRegName(MI->getOperand(1).getReg());
945953
StringRef Src2Name = getRegName(MI->getOperand(Src2Idx).getReg());
946-
StringRef Src3Name =
947-
Src3Idx != -1 ? getRegName(MI->getOperand(Src3Idx).getReg()) : "mem";
954+
StringRef Src3Name;
955+
switch (Src3Idx) {
956+
case -1:
957+
Src3Name = "mem";
958+
break;
959+
case -2:
960+
Src3Name = "m32bcst";
961+
break;
962+
case -3:
963+
Src3Name = "m64bcst";
964+
break;
965+
default:
966+
Src3Name = getRegName(MI->getOperand(Src3Idx).getReg());
967+
break;
968+
}
948969
uint8_t TruthTable = MI->getOperand(NumOperands - 1).getImm();
949970

950971
StringRef SrcNames[] = {Src1Name, Src2Name, Src3Name};

‎llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1235,7 +1235,7 @@ define void @vec256_i8_widen_to_i32_factor4_broadcast_to_v8i32_factor8(ptr %in.v
12351235
; AVX512F-NEXT: vmovdqa (%rdi), %xmm1
12361236
; AVX512F-NEXT: vpaddb (%rsi), %xmm1, %xmm1
12371237
; AVX512F-NEXT: vpbroadcastb %xmm1, %ymm1
1238-
; AVX512F-NEXT: vpternlogd {{.*#+}} ymm1 = ymm1 ^ (mem & (ymm1 ^ ymm0))
1238+
; AVX512F-NEXT: vpternlogd {{.*#+}} ymm1 = ymm1 ^ (m32bcst & (ymm1 ^ ymm0))
12391239
; AVX512F-NEXT: vpaddb (%rdx), %ymm1, %ymm0
12401240
; AVX512F-NEXT: vmovdqa %ymm0, (%rcx)
12411241
; AVX512F-NEXT: vzeroupper
@@ -1248,7 +1248,7 @@ define void @vec256_i8_widen_to_i32_factor4_broadcast_to_v8i32_factor8(ptr %in.v
12481248
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm1
12491249
; AVX512DQ-NEXT: vpaddb (%rsi), %xmm1, %xmm1
12501250
; AVX512DQ-NEXT: vpbroadcastb %xmm1, %ymm1
1251-
; AVX512DQ-NEXT: vpternlogd {{.*#+}} ymm1 = ymm1 ^ (mem & (ymm1 ^ ymm0))
1251+
; AVX512DQ-NEXT: vpternlogd {{.*#+}} ymm1 = ymm1 ^ (m32bcst & (ymm1 ^ ymm0))
12521252
; AVX512DQ-NEXT: vpaddb (%rdx), %ymm1, %ymm0
12531253
; AVX512DQ-NEXT: vmovdqa %ymm0, (%rcx)
12541254
; AVX512DQ-NEXT: vzeroupper
@@ -1359,7 +1359,7 @@ define void @vec256_i8_widen_to_i64_factor8_broadcast_to_v4i64_factor4(ptr %in.v
13591359
; AVX512F-NEXT: vmovdqa (%rdi), %xmm1
13601360
; AVX512F-NEXT: vpaddb (%rsi), %xmm1, %xmm1
13611361
; AVX512F-NEXT: vpbroadcastb %xmm1, %ymm1
1362-
; AVX512F-NEXT: vpternlogq {{.*#+}} ymm1 = ymm1 ^ (mem & (ymm1 ^ ymm0))
1362+
; AVX512F-NEXT: vpternlogq {{.*#+}} ymm1 = ymm1 ^ (m64bcst & (ymm1 ^ ymm0))
13631363
; AVX512F-NEXT: vpaddb (%rdx), %ymm1, %ymm0
13641364
; AVX512F-NEXT: vmovdqa %ymm0, (%rcx)
13651365
; AVX512F-NEXT: vzeroupper
@@ -1372,7 +1372,7 @@ define void @vec256_i8_widen_to_i64_factor8_broadcast_to_v4i64_factor4(ptr %in.v
13721372
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm1
13731373
; AVX512DQ-NEXT: vpaddb (%rsi), %xmm1, %xmm1
13741374
; AVX512DQ-NEXT: vpbroadcastb %xmm1, %ymm1
1375-
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm1 ^ (mem & (ymm1 ^ ymm0))
1375+
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm1 ^ (m64bcst & (ymm1 ^ ymm0))
13761376
; AVX512DQ-NEXT: vpaddb (%rdx), %ymm1, %ymm0
13771377
; AVX512DQ-NEXT: vmovdqa %ymm0, (%rcx)
13781378
; AVX512DQ-NEXT: vzeroupper
@@ -2702,7 +2702,7 @@ define void @vec384_i8_widen_to_i32_factor4_broadcast_to_v12i32_factor12(ptr %in
27022702
; AVX512F-NEXT: vpaddb 48(%rsi), %xmm1, %xmm1
27032703
; AVX512F-NEXT: vpaddb (%rsi), %xmm0, %xmm0
27042704
; AVX512F-NEXT: vpbroadcastb %xmm0, %ymm0
2705-
; AVX512F-NEXT: vpternlogd {{.*#+}} ymm1 = ymm0 ^ (mem & (ymm1 ^ ymm0))
2705+
; AVX512F-NEXT: vpternlogd {{.*#+}} ymm1 = ymm0 ^ (m32bcst & (ymm1 ^ ymm0))
27062706
; AVX512F-NEXT: vpaddb (%rdx), %ymm1, %ymm1
27072707
; AVX512F-NEXT: vpaddb 32(%rdx), %ymm0, %ymm0
27082708
; AVX512F-NEXT: vmovdqa %ymm0, 32(%rcx)
@@ -2717,7 +2717,7 @@ define void @vec384_i8_widen_to_i32_factor4_broadcast_to_v12i32_factor12(ptr %in
27172717
; AVX512DQ-NEXT: vpaddb 48(%rsi), %xmm1, %xmm1
27182718
; AVX512DQ-NEXT: vpaddb (%rsi), %xmm0, %xmm0
27192719
; AVX512DQ-NEXT: vpbroadcastb %xmm0, %ymm0
2720-
; AVX512DQ-NEXT: vpternlogd {{.*#+}} ymm1 = ymm0 ^ (mem & (ymm1 ^ ymm0))
2720+
; AVX512DQ-NEXT: vpternlogd {{.*#+}} ymm1 = ymm0 ^ (m32bcst & (ymm1 ^ ymm0))
27212721
; AVX512DQ-NEXT: vpaddb (%rdx), %ymm1, %ymm1
27222722
; AVX512DQ-NEXT: vpaddb 32(%rdx), %ymm0, %ymm0
27232723
; AVX512DQ-NEXT: vmovdqa %ymm0, 32(%rcx)
@@ -2964,7 +2964,7 @@ define void @vec384_i8_widen_to_i64_factor8_broadcast_to_v6i64_factor6(ptr %in.v
29642964
; AVX512F-NEXT: vpaddb 48(%rsi), %xmm1, %xmm1
29652965
; AVX512F-NEXT: vpaddb (%rsi), %xmm0, %xmm0
29662966
; AVX512F-NEXT: vpbroadcastb %xmm0, %ymm0
2967-
; AVX512F-NEXT: vpternlogq {{.*#+}} ymm1 = ymm0 ^ (mem & (ymm1 ^ ymm0))
2967+
; AVX512F-NEXT: vpternlogq {{.*#+}} ymm1 = ymm0 ^ (m64bcst & (ymm1 ^ ymm0))
29682968
; AVX512F-NEXT: vpaddb (%rdx), %ymm1, %ymm1
29692969
; AVX512F-NEXT: vpaddb 32(%rdx), %ymm0, %ymm0
29702970
; AVX512F-NEXT: vmovdqa %ymm0, 32(%rcx)
@@ -2979,7 +2979,7 @@ define void @vec384_i8_widen_to_i64_factor8_broadcast_to_v6i64_factor6(ptr %in.v
29792979
; AVX512DQ-NEXT: vpaddb 48(%rsi), %xmm1, %xmm1
29802980
; AVX512DQ-NEXT: vpaddb (%rsi), %xmm0, %xmm0
29812981
; AVX512DQ-NEXT: vpbroadcastb %xmm0, %ymm0
2982-
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm0 ^ (mem & (ymm1 ^ ymm0))
2982+
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm0 ^ (m64bcst & (ymm1 ^ ymm0))
29832983
; AVX512DQ-NEXT: vpaddb (%rdx), %ymm1, %ymm1
29842984
; AVX512DQ-NEXT: vpaddb 32(%rdx), %ymm0, %ymm0
29852985
; AVX512DQ-NEXT: vmovdqa %ymm0, 32(%rcx)

‎llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1020,7 +1020,7 @@ define void @vec256_i8_widen_to_i32_factor4_broadcast_to_v8i32_factor8(ptr %in.e
10201020
; AVX512F: # %bb.0:
10211021
; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm0
10221022
; AVX512F-NEXT: vpbroadcastb (%rdi), %ymm1
1023-
; AVX512F-NEXT: vpternlogd {{.*#+}} ymm1 = ymm1 ^ (mem & (ymm1 ^ ymm0))
1023+
; AVX512F-NEXT: vpternlogd {{.*#+}} ymm1 = ymm1 ^ (m32bcst & (ymm1 ^ ymm0))
10241024
; AVX512F-NEXT: vpaddb (%rsi), %ymm1, %ymm0
10251025
; AVX512F-NEXT: vmovdqa %ymm0, (%rdx)
10261026
; AVX512F-NEXT: vzeroupper
@@ -1030,7 +1030,7 @@ define void @vec256_i8_widen_to_i32_factor4_broadcast_to_v8i32_factor8(ptr %in.e
10301030
; AVX512DQ: # %bb.0:
10311031
; AVX512DQ-NEXT: vmovdqa 32(%rdi), %ymm0
10321032
; AVX512DQ-NEXT: vpbroadcastb (%rdi), %ymm1
1033-
; AVX512DQ-NEXT: vpternlogd {{.*#+}} ymm1 = ymm1 ^ (mem & (ymm1 ^ ymm0))
1033+
; AVX512DQ-NEXT: vpternlogd {{.*#+}} ymm1 = ymm1 ^ (m32bcst & (ymm1 ^ ymm0))
10341034
; AVX512DQ-NEXT: vpaddb (%rsi), %ymm1, %ymm0
10351035
; AVX512DQ-NEXT: vmovdqa %ymm0, (%rdx)
10361036
; AVX512DQ-NEXT: vzeroupper
@@ -1116,7 +1116,7 @@ define void @vec256_i8_widen_to_i64_factor8_broadcast_to_v4i64_factor4(ptr %in.e
11161116
; AVX512F: # %bb.0:
11171117
; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm0
11181118
; AVX512F-NEXT: vpbroadcastb (%rdi), %ymm1
1119-
; AVX512F-NEXT: vpternlogq {{.*#+}} ymm1 = ymm1 ^ (mem & (ymm1 ^ ymm0))
1119+
; AVX512F-NEXT: vpternlogq {{.*#+}} ymm1 = ymm1 ^ (m64bcst & (ymm1 ^ ymm0))
11201120
; AVX512F-NEXT: vpaddb (%rsi), %ymm1, %ymm0
11211121
; AVX512F-NEXT: vmovdqa %ymm0, (%rdx)
11221122
; AVX512F-NEXT: vzeroupper
@@ -1126,7 +1126,7 @@ define void @vec256_i8_widen_to_i64_factor8_broadcast_to_v4i64_factor4(ptr %in.e
11261126
; AVX512DQ: # %bb.0:
11271127
; AVX512DQ-NEXT: vmovdqa 32(%rdi), %ymm0
11281128
; AVX512DQ-NEXT: vpbroadcastb (%rdi), %ymm1
1129-
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm1 ^ (mem & (ymm1 ^ ymm0))
1129+
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm1 = ymm1 ^ (m64bcst & (ymm1 ^ ymm0))
11301130
; AVX512DQ-NEXT: vpaddb (%rsi), %ymm1, %ymm0
11311131
; AVX512DQ-NEXT: vmovdqa %ymm0, (%rdx)
11321132
; AVX512DQ-NEXT: vzeroupper
@@ -2125,7 +2125,7 @@ define void @vec384_i8_widen_to_i32_factor4_broadcast_to_v12i32_factor12(ptr %in
21252125
; AVX512F: # %bb.0:
21262126
; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0
21272127
; AVX512F-NEXT: vpbroadcastb (%rdi), %ymm1
2128-
; AVX512F-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (mem & (ymm0 ^ ymm1))
2128+
; AVX512F-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (m32bcst & (ymm0 ^ ymm1))
21292129
; AVX512F-NEXT: vpaddb (%rsi), %ymm0, %ymm0
21302130
; AVX512F-NEXT: vpaddb 32(%rsi), %ymm1, %ymm1
21312131
; AVX512F-NEXT: vmovdqa %ymm1, 32(%rdx)
@@ -2137,7 +2137,7 @@ define void @vec384_i8_widen_to_i32_factor4_broadcast_to_v12i32_factor12(ptr %in
21372137
; AVX512DQ: # %bb.0:
21382138
; AVX512DQ-NEXT: vmovdqa 48(%rdi), %xmm0
21392139
; AVX512DQ-NEXT: vpbroadcastb (%rdi), %ymm1
2140-
; AVX512DQ-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (mem & (ymm0 ^ ymm1))
2140+
; AVX512DQ-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (m32bcst & (ymm0 ^ ymm1))
21412141
; AVX512DQ-NEXT: vpaddb (%rsi), %ymm0, %ymm0
21422142
; AVX512DQ-NEXT: vpaddb 32(%rsi), %ymm1, %ymm1
21432143
; AVX512DQ-NEXT: vmovdqa %ymm1, 32(%rdx)
@@ -2346,7 +2346,7 @@ define void @vec384_i8_widen_to_i64_factor8_broadcast_to_v6i64_factor6(ptr %in.e
23462346
; AVX512F: # %bb.0:
23472347
; AVX512F-NEXT: vmovdqa 48(%rdi), %xmm0
23482348
; AVX512F-NEXT: vpbroadcastb (%rdi), %ymm1
2349-
; AVX512F-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (mem & (ymm0 ^ ymm1))
2349+
; AVX512F-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (m64bcst & (ymm0 ^ ymm1))
23502350
; AVX512F-NEXT: vpaddb (%rsi), %ymm0, %ymm0
23512351
; AVX512F-NEXT: vpaddb 32(%rsi), %ymm1, %ymm1
23522352
; AVX512F-NEXT: vmovdqa %ymm1, 32(%rdx)
@@ -2358,7 +2358,7 @@ define void @vec384_i8_widen_to_i64_factor8_broadcast_to_v6i64_factor6(ptr %in.e
23582358
; AVX512DQ: # %bb.0:
23592359
; AVX512DQ-NEXT: vmovdqa 48(%rdi), %xmm0
23602360
; AVX512DQ-NEXT: vpbroadcastb (%rdi), %ymm1
2361-
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (mem & (ymm0 ^ ymm1))
2361+
; AVX512DQ-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (m64bcst & (ymm0 ^ ymm1))
23622362
; AVX512DQ-NEXT: vpaddb (%rsi), %ymm0, %ymm0
23632363
; AVX512DQ-NEXT: vpaddb 32(%rsi), %ymm1, %ymm1
23642364
; AVX512DQ-NEXT: vmovdqa %ymm1, 32(%rdx)

‎llvm/test/CodeGen/X86/avgfloors.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ define <16 x i8> @test_fixed_v16i8(<16 x i8> %a0, <16 x i8> %a1) nounwind {
5353
; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
5454
; AVX512-NEXT: vpsrlw $1, %xmm0, %xmm0
5555
; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
56-
; AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (xmm0 & mem)
56+
; AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (xmm0 & m32bcst)
5757
; AVX512-NEXT: vpaddb %xmm2, %xmm0, %xmm0
5858
; AVX512-NEXT: vpsubb %xmm1, %xmm0, %xmm0
5959
; AVX512-NEXT: retq
@@ -108,7 +108,7 @@ define <16 x i8> @test_ext_v16i8(<16 x i8> %a0, <16 x i8> %a1) nounwind {
108108
; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
109109
; AVX512-NEXT: vpsrlw $1, %xmm0, %xmm0
110110
; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
111-
; AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (xmm0 & mem)
111+
; AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (xmm0 & m32bcst)
112112
; AVX512-NEXT: vpaddb %xmm2, %xmm0, %xmm0
113113
; AVX512-NEXT: vpsubb %xmm1, %xmm0, %xmm0
114114
; AVX512-NEXT: retq
@@ -405,7 +405,7 @@ define <32 x i8> @test_fixed_v32i8(<32 x i8> %a0, <32 x i8> %a1) nounwind {
405405
; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0
406406
; AVX512-NEXT: vpsrlw $1, %ymm0, %ymm0
407407
; AVX512-NEXT: vpbroadcastd {{.*#+}} ymm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
408-
; AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (ymm0 & mem)
408+
; AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (ymm0 & m32bcst)
409409
; AVX512-NEXT: vpaddb %ymm2, %ymm0, %ymm0
410410
; AVX512-NEXT: vpsubb %ymm1, %ymm0, %ymm0
411411
; AVX512-NEXT: retq
@@ -478,7 +478,7 @@ define <32 x i8> @test_ext_v32i8(<32 x i8> %a0, <32 x i8> %a1) nounwind {
478478
; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0
479479
; AVX512-NEXT: vpsrlw $1, %ymm0, %ymm0
480480
; AVX512-NEXT: vpbroadcastd {{.*#+}} ymm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
481-
; AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (ymm0 & mem)
481+
; AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (ymm0 & m32bcst)
482482
; AVX512-NEXT: vpaddb %ymm2, %ymm0, %ymm0
483483
; AVX512-NEXT: vpsubb %ymm1, %ymm0, %ymm0
484484
; AVX512-NEXT: retq
@@ -966,7 +966,7 @@ define <64 x i8> @test_fixed_v64i8(<64 x i8> %a0, <64 x i8> %a1) nounwind {
966966
; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
967967
; AVX512-NEXT: vpsrlw $1, %zmm0, %zmm0
968968
; AVX512-NEXT: vpbroadcastd {{.*#+}} zmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
969-
; AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (zmm0 & mem)
969+
; AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (zmm0 & m32bcst)
970970
; AVX512-NEXT: vpaddb %zmm2, %zmm0, %zmm0
971971
; AVX512-NEXT: vpsubb %zmm1, %zmm0, %zmm0
972972
; AVX512-NEXT: retq
@@ -1078,7 +1078,7 @@ define <64 x i8> @test_ext_v64i8(<64 x i8> %a0, <64 x i8> %a1) nounwind {
10781078
; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
10791079
; AVX512-NEXT: vpsrlw $1, %zmm0, %zmm0
10801080
; AVX512-NEXT: vpbroadcastd {{.*#+}} zmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
1081-
; AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (zmm0 & mem)
1081+
; AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (zmm0 & m32bcst)
10821082
; AVX512-NEXT: vpaddb %zmm2, %zmm0, %zmm0
10831083
; AVX512-NEXT: vpsubb %zmm1, %zmm0, %zmm0
10841084
; AVX512-NEXT: retq

‎llvm/test/CodeGen/X86/avx512-cvt.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -351,7 +351,7 @@ define <8 x double> @ulto8f64(<8 x i64> %a) {
351351
; NODQ-LABEL: ulto8f64:
352352
; NODQ: # %bb.0:
353353
; NODQ-NEXT: vpbroadcastq {{.*#+}} zmm1 = [4841369599423283200,4841369599423283200,4841369599423283200,4841369599423283200,4841369599423283200,4841369599423283200,4841369599423283200,4841369599423283200]
354-
; NODQ-NEXT: vpternlogq {{.*#+}} zmm1 = zmm1 | (zmm0 & mem)
354+
; NODQ-NEXT: vpternlogq {{.*#+}} zmm1 = zmm1 | (zmm0 & m64bcst)
355355
; NODQ-NEXT: vpsrlq $32, %zmm0, %zmm0
356356
; NODQ-NEXT: vporq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0
357357
; NODQ-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0

‎llvm/test/CodeGen/X86/avx512-logic.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -889,7 +889,7 @@ define <16 x i32> @ternlog_xor_andn(<16 x i32> %x, <16 x i32> %y, <16 x i32> %z)
889889
define <16 x i32> @ternlog_or_and_mask(<16 x i32> %x, <16 x i32> %y) {
890890
; ALL-LABEL: ternlog_or_and_mask:
891891
; ALL: ## %bb.0:
892-
; ALL-NEXT: vpternlogd {{.*#+}} zmm0 = (zmm0 & mem) | zmm1
892+
; ALL-NEXT: vpternlogd {{.*#+}} zmm0 = (zmm0 & m32bcst) | zmm1
893893
; ALL-NEXT: retq
894894
%a = and <16 x i32> %x, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
895895
%b = or <16 x i32> %a, %y
@@ -899,7 +899,7 @@ define <16 x i32> @ternlog_or_and_mask(<16 x i32> %x, <16 x i32> %y) {
899899
define <8 x i64> @ternlog_xor_and_mask(<8 x i64> %x, <8 x i64> %y) {
900900
; ALL-LABEL: ternlog_xor_and_mask:
901901
; ALL: ## %bb.0:
902-
; ALL-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (zmm0 & mem)
902+
; ALL-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (zmm0 & m64bcst)
903903
; ALL-NEXT: retq
904904
%a = and <8 x i64> %x, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>
905905
%b = xor <8 x i64> %a, %y

‎llvm/test/CodeGen/X86/avx512fp16-arith.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -384,7 +384,7 @@ declare <8 x half> @llvm.fabs.v8f16(<8 x half>)
384384
define <8 x half> @fcopysignv8f16(<8 x half> %x, <8 x half> %y) {
385385
; CHECK-LABEL: fcopysignv8f16:
386386
; CHECK: ## %bb.0:
387-
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (mem & (xmm0 ^ xmm1))
387+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (m32bcst & (xmm0 ^ xmm1))
388388
; CHECK-NEXT: retq
389389
%a = call <8 x half> @llvm.copysign.v8f16(<8 x half> %x, <8 x half> %y)
390390
ret <8 x half> %a
@@ -439,7 +439,7 @@ declare <16 x half> @llvm.fabs.v16f16(<16 x half>)
439439
define <16 x half> @fcopysignv16f16(<16 x half> %x, <16 x half> %y) {
440440
; CHECK-LABEL: fcopysignv16f16:
441441
; CHECK: ## %bb.0:
442-
; CHECK-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (mem & (ymm0 ^ ymm1))
442+
; CHECK-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (m32bcst & (ymm0 ^ ymm1))
443443
; CHECK-NEXT: retq
444444
%a = call <16 x half> @llvm.copysign.v16f16(<16 x half> %x, <16 x half> %y)
445445
ret <16 x half> %a
@@ -494,7 +494,7 @@ declare <32 x half> @llvm.fabs.v32f16(<32 x half>)
494494
define <32 x half> @fcopysignv32f16(<32 x half> %x, <32 x half> %y) {
495495
; CHECK-LABEL: fcopysignv32f16:
496496
; CHECK: ## %bb.0:
497-
; CHECK-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (mem & (zmm0 ^ zmm1))
497+
; CHECK-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (m32bcst & (zmm0 ^ zmm1))
498498
; CHECK-NEXT: retq
499499
%a = call <32 x half> @llvm.copysign.v32f16(<32 x half> %x, <32 x half> %y)
500500
ret <32 x half> %a

‎llvm/test/CodeGen/X86/avx512vl-logic.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1039,7 +1039,7 @@ define <4 x i32> @ternlog_xor_andn(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
10391039
define <4 x i32> @ternlog_or_and_mask(<4 x i32> %x, <4 x i32> %y) {
10401040
; CHECK-LABEL: ternlog_or_and_mask:
10411041
; CHECK: ## %bb.0:
1042-
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = (xmm0 & mem) | xmm1
1042+
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = (xmm0 & m32bcst) | xmm1
10431043
; CHECK-NEXT: retq
10441044
%a = and <4 x i32> %x, <i32 255, i32 255, i32 255, i32 255>
10451045
%b = or <4 x i32> %a, %y
@@ -1049,7 +1049,7 @@ define <4 x i32> @ternlog_or_and_mask(<4 x i32> %x, <4 x i32> %y) {
10491049
define <8 x i32> @ternlog_or_and_mask_ymm(<8 x i32> %x, <8 x i32> %y) {
10501050
; CHECK-LABEL: ternlog_or_and_mask_ymm:
10511051
; CHECK: ## %bb.0:
1052-
; CHECK-NEXT: vpternlogd {{.*#+}} ymm0 = (ymm0 & mem) | ymm1
1052+
; CHECK-NEXT: vpternlogd {{.*#+}} ymm0 = (ymm0 & m32bcst) | ymm1
10531053
; CHECK-NEXT: retq
10541054
%a = and <8 x i32> %x, <i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216, i32 -16777216>
10551055
%b = or <8 x i32> %a, %y
@@ -1059,7 +1059,7 @@ define <8 x i32> @ternlog_or_and_mask_ymm(<8 x i32> %x, <8 x i32> %y) {
10591059
define <2 x i64> @ternlog_xor_and_mask(<2 x i64> %x, <2 x i64> %y) {
10601060
; CHECK-LABEL: ternlog_xor_and_mask:
10611061
; CHECK: ## %bb.0:
1062-
; CHECK-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (xmm0 & mem)
1062+
; CHECK-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (xmm0 & m64bcst)
10631063
; CHECK-NEXT: retq
10641064
%a = and <2 x i64> %x, <i64 1099511627775, i64 1099511627775>
10651065
%b = xor <2 x i64> %a, %y
@@ -1069,7 +1069,7 @@ define <2 x i64> @ternlog_xor_and_mask(<2 x i64> %x, <2 x i64> %y) {
10691069
define <4 x i64> @ternlog_xor_and_mask_ymm(<4 x i64> %x, <4 x i64> %y) {
10701070
; CHECK-LABEL: ternlog_xor_and_mask_ymm:
10711071
; CHECK: ## %bb.0:
1072-
; CHECK-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (ymm0 & mem)
1072+
; CHECK-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (ymm0 & m64bcst)
10731073
; CHECK-NEXT: retq
10741074
%a = and <4 x i64> %x, <i64 72057594037927935, i64 72057594037927935, i64 72057594037927935, i64 72057594037927935>
10751075
%b = xor <4 x i64> %a, %y

‎llvm/test/CodeGen/X86/combine-bitselect.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -283,7 +283,7 @@ define <2 x i64> @bitselect_v2i64_broadcast_rrm(<2 x i64> %a0, <2 x i64> %a1, pt
283283
;
284284
; AVX512VL-LABEL: bitselect_v2i64_broadcast_rrm:
285285
; AVX512VL: # %bb.0:
286-
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (mem & (xmm0 ^ xmm1))
286+
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (m64bcst & (xmm0 ^ xmm1))
287287
; AVX512VL-NEXT: retq
288288
%a2 = load i64, ptr %p2
289289
%1 = insertelement <2 x i64> undef, i64 %a2, i32 0
@@ -604,7 +604,7 @@ define <4 x i64> @bitselect_v4i64_broadcast_rrm(<4 x i64> %a0, <4 x i64> %a1, pt
604604
;
605605
; AVX512VL-LABEL: bitselect_v4i64_broadcast_rrm:
606606
; AVX512VL: # %bb.0:
607-
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (mem & (ymm0 ^ ymm1))
607+
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (m64bcst & (ymm0 ^ ymm1))
608608
; AVX512VL-NEXT: retq
609609
%a2 = load i64, ptr %p2
610610
%1 = insertelement <4 x i64> undef, i64 %a2, i32 0
@@ -975,7 +975,7 @@ define <8 x i64> @bitselect_v8i64_broadcast_rrm(<8 x i64> %a0, <8 x i64> %a1, pt
975975
;
976976
; AVX512-LABEL: bitselect_v8i64_broadcast_rrm:
977977
; AVX512: # %bb.0:
978-
; AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (mem & (zmm0 ^ zmm1))
978+
; AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (m64bcst & (zmm0 ^ zmm1))
979979
; AVX512-NEXT: retq
980980
%a2 = load i64, ptr %p2
981981
%1 = insertelement <8 x i64> undef, i64 %a2, i32 0

‎llvm/test/CodeGen/X86/combine-or-shuffle.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -808,7 +808,7 @@ define <2 x i64> @or_and_v2i64(<2 x i64> %a0) {
808808
; AVX512-LABEL: or_and_v2i64:
809809
; AVX512: # %bb.0:
810810
; AVX512-NEXT: vpbroadcastq {{.*#+}} xmm1 = [7,7]
811-
; AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 & (xmm0 | mem)
811+
; AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 & (xmm0 | m64bcst)
812812
; AVX512-NEXT: retq
813813
%1 = and <2 x i64> %a0, <i64 7, i64 7>
814814
%2 = or <2 x i64> %1, <i64 3, i64 3>

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