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Remove REMAT_DEBUG and break ties in score
1 parent 1449859 commit 7b38672

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2 files changed

+15
-9
lines changed

2 files changed

+15
-9
lines changed

llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1105,16 +1105,16 @@ bool ClusteredLowOccStage::initGCNSchedStage() {
11051105
void PreRARematStage::printTargetRegions(bool PrintAll) const {
11061106
if (PrintAll) {
11071107
for (auto [I, Target] : enumerate(RPTargets))
1108-
REMAT_DEBUG(dbgs() << " [" << I << "] " << Target << '\n');
1108+
dbgs() << REMAT_PREFIX << " [" << I << "] " << Target << '\n';
11091109
return;
11101110
}
11111111
if (TargetRegions.none()) {
1112-
REMAT_DEBUG(dbgs() << "No target regions\n");
1112+
dbgs() << REMAT_PREFIX << "No target regions\n";
11131113
return;
11141114
}
1115-
REMAT_DEBUG(dbgs() << "Target regions:\n");
1115+
dbgs() << REMAT_PREFIX << "Target regions:\n";
11161116
for (unsigned I : TargetRegions.set_bits())
1117-
REMAT_DEBUG(dbgs() << " [" << I << "] " << RPTargets[I] << '\n');
1117+
dbgs() << REMAT_PREFIX << " [" << I << "] " << RPTargets[I] << '\n';
11181118
}
11191119

11201120
void PreRARematStage::RematReg::print(
@@ -1230,8 +1230,8 @@ bool PreRARematStage::initGCNSchedStage() {
12301230
}
12311231
unsetSatisifedRPTargets(RescheduleRegions);
12321232

1233+
LLVM_DEBUG(printTargetRegions());
12331234
#ifndef NDEBUG
1234-
printTargetRegions();
12351235
unsigned RoundNum = 0;
12361236
#endif
12371237

@@ -1242,7 +1242,7 @@ bool PreRARematStage::initGCNSchedStage() {
12421242
// (Re-)Score and (re-)sort all remats in increasing score order.
12431243
for (ScoredRemat &Remat : ScoredRemats)
12441244
Remat.update(TargetRegions, RPTargets, RegionFreq, !TargetOcc);
1245-
stable_sort(ScoredRemats);
1245+
sort(ScoredRemats);
12461246

12471247
REMAT_DEBUG({
12481248
dbgs() << "==== ROUND " << RoundNum << " ====\n";
@@ -1294,8 +1294,8 @@ bool PreRARematStage::initGCNSchedStage() {
12941294
unsetSatisifedRPTargets(Remat.Live);
12951295
}
12961296

1297+
LLVM_DEBUG(printTargetRegions());
12971298
#ifndef NDEBUG
1298-
printTargetRegions();
12991299
++RoundNum;
13001300
#endif
13011301

llvm/lib/Target/AMDGPU/GCNSchedStrategy.h

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -530,8 +530,14 @@ class PreRARematStage : public GCNSchedStage {
530530

531531
int getScore() const { return Score; }
532532

533-
bool operator<(const ScoredRemat &O) const { return Score < O.Score; }
534-
bool operator==(const ScoredRemat &O) const { return Score == O.Score; }
533+
bool operator<(const ScoredRemat &O) const {
534+
// Break ties using pointer to rematerializable register. Since
535+
// rematerializations are collected in instruction order, registers
536+
// appearing earlier have a "higher score" than those appearing later.
537+
if (Score == O.Score)
538+
return Remat > O.Remat;
539+
return Score < O.Score;
540+
}
535541

536542
private:
537543
/// Estimated save/restore latency costs for spilling a register to stack.

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