[DAG] Apply Disjoint flag.

or disjoint (or disjoint (x, c0), c1)
-->
or disjont x, or (c0, c1)
Alive2: https://alive2.llvm.org/ce/z/3wPth5

Signed-off-by: feng.feng <[email protected]>

Author: fengfeng09

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

@@ -1220,8 +1220,11 @@ SDValue DAGCombiner::reassociateOpsCommutative(unsigned Opc, const SDLoc &DL,
 
     if (DAG.isConstantIntBuildVectorOrConstantInt(N1)) {
       // Reassociate: (op (op x, c1), c2) -> (op x, (op c1, c2))
-      if (SDValue OpNode = DAG.FoldConstantArithmetic(Opc, DL, VT, {N01, N1}))
+      if (SDValue OpNode = DAG.FoldConstantArithmetic(Opc, DL, VT, {N01, N1})) {
+        NewFlags.setDisjoint(Flags.hasDisjoint() &&
+                             N0->getFlags().hasDisjoint());
         return DAG.getNode(Opc, DL, VT, N00, OpNode, NewFlags);
+      }
       return SDValue();
     }
     if (TLI.isReassocProfitable(DAG, N0, N1)) {

llvm/test/CodeGen/AArch64/apply-disjoint-flag-in-dagcombine.ll

@@ -4,8 +4,7 @@
 define i32 @test(i32 %a) {
 ; CHECK-LABEL: test:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    add w8, w0, #1
-; CHECK-NEXT:    orr w0, w8, #0xc0
+; CHECK-NEXT:    add w0, w0, #193
 ; CHECK-NEXT:    ret
 entry:
   %add = add i32 %a, 1