Skip to content

Commit 7c5dfa8

Browse files
committed
Avoid unnecessary declaration
1 parent 0758610 commit 7c5dfa8

File tree

2 files changed

+28
-7
lines changed

2 files changed

+28
-7
lines changed

llvm/test/TableGen/RegClassByHwMode.td

Lines changed: 27 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,6 @@
66

77
include "llvm/Target/Target.td"
88

9-
109
// INSTRINFO: #if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
1110
// INSTRINFO-NEXT: namespace {
1211
// INSTRINFO-NEXT: enum RegClassByHwModeUses : uint16_t {
@@ -24,6 +23,33 @@ include "llvm/Target/Target.td"
2423
// INSTRINFO: { YRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { XRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
2524

2625

26+
// INSTRINFO: extern const int16_t MyTargetRegClassByHwModeTables[4][3] = {
27+
// INSTRINFO-NEXT: { // DefaultMode
28+
// INSTRINFO-NEXT: MyTarget::PtrRegs32RegClassID,
29+
// INSTRINFO-NEXT: MyTarget::XRegsRegClassID,
30+
// INSTRINFO-NEXT: MyTarget::YRegsRegClassID,
31+
// INSTRINFO-NEXT: },
32+
// INSTRINFO-NEXT: { // EvenMode
33+
// INSTRINFO-NEXT: -1, // Missing mode entry
34+
// INSTRINFO-NEXT: MyTarget::XRegs_EvenRegClassID,
35+
// INSTRINFO-NEXT: MyTarget::YRegs_EvenRegClassID,
36+
// INSTRINFO-NEXT: },
37+
// INSTRINFO-NEXT: { // OddMode
38+
// INSTRINFO-NEXT: -1, // Missing mode entry
39+
// INSTRINFO-NEXT: MyTarget::XRegs_OddRegClassID,
40+
// INSTRINFO-NEXT: -1, // Missing mode entry
41+
// INSTRINFO-NEXT: },
42+
// INSTRINFO-NEXT: { // Ptr64
43+
// INSTRINFO-NEXT: MyTarget::PtrRegs64RegClassID,
44+
// INSTRINFO-NEXT: -1, // Missing mode entry
45+
// INSTRINFO-NEXT: -1, // Missing mode entry
46+
// INSTRINFO-NEXT: },
47+
// INSTRINFO-NEXT: };
48+
49+
// INSTRINFO: static inline void InitMyTargetMCInstrInfo(
50+
// INSTRINFO-NEXT: II->InitMCInstrInfo(MyTargetDescs.Insts, MyTargetInstrNameIndices, MyTargetInstrNameData, nullptr, nullptr, 321, &MyTargetRegClassByHwModeTables[0][0], 3);
51+
52+
2753

2854
// ASMMATCHER: enum MatchClassKind {
2955
// ASMMATCHER: MCK_LAST_TOKEN = OptionalMatchClass,

llvm/utils/TableGen/InstrInfoEmitter.cpp

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1008,11 +1008,6 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
10081008
ArrayRef<const Record *> RegClassByHwMode = Target.getAllRegClassByHwMode();
10091009
unsigned NumClassesByHwMode = RegClassByHwMode.size();
10101010

1011-
if (NumClassesByHwMode != 0) {
1012-
OS << "extern const int16_t " << TargetName << "RegClassByHwModeTables["
1013-
<< NumModes << "][" << NumClassesByHwMode << "];\n";
1014-
}
1015-
10161011
OS << "extern const unsigned " << TargetName << "InstrNameIndices[] = {";
10171012
Num = 0;
10181013
for (const CodeGenInstruction *Inst : NumberedInstructions) {
@@ -1072,7 +1067,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
10721067
Timer.startTimer("Emit initialization routine");
10731068

10741069
if (NumClassesByHwMode != 0) {
1075-
OS << "const int16_t " << TargetName << "RegClassByHwModeTables["
1070+
OS << "extern const int16_t " << TargetName << "RegClassByHwModeTables["
10761071
<< NumModes << "][" << NumClassesByHwMode << "] = {\n";
10771072

10781073
for (unsigned M = 0; M < NumModes; ++M) {

0 commit comments

Comments
 (0)