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Author: cassiebeckley

llvm/docs/SPIRVUsage.rst

@@ -286,6 +286,28 @@ representing an ``OpConstant`` id operand, a ``spirv.Literal`` type, representin
 literal operand, or any other type, representing the id of that type as an operand.
 ``spirv.IntegralConstant`` and ``spirv.Literal`` may not be used outside of this context.
 
+For example, ``OpTypeArray`` (opcode 28) takes an id for the element type and an id for the element
+length, so an array of 16 integers could be declared as:
+
+``target("spirv.Type", i32, target("spirv.IntegralConstant", i32, 16), 28, 64, 32)``
+
+This will be lowered to:
+
+``OpTypeArray %int %int_16``
+
+``OpTypeVector`` takes an id for the component type and a literal for the component count, so a
+4-integer vector could be declared as:
+
+``target("spirv.Type", i32, target("spirv.Literal", 4), 23, 16, 32)``
+
+This will be lowered to:
+
+``OpTypeVector %int 4``
+
+See `Target Extension Types for Inline SPIR-V and Decorated Types`_ for further details.
+
+.. _Target Extension Types for Inline SPIR-V and Decorated Types: https://github.com/llvm/wg-hlsl/blob/main/proposals/0017-inline-spirv-and-decorated-types.md
+
 .. _spirv-intrinsics:
 
 Target Intrinsics

llvm/lib/IR/Type.cpp

@@ -975,13 +975,16 @@ static TargetTypeInfo getTargetTypeInfo(const TargetExtType *Ty) {
     auto Size = Ty->getIntParameter(1);
     auto Alignment = Ty->getIntParameter(2);
 
-    // LLVM expects variables that can be allocated to have an alignment and
-    // size. Default to using a 32-bit int as the layout type if none are
-    // present.
-    llvm::Type *LayoutType = Type::getInt32Ty(C);
-    if (Size > 0 && Alignment > 0)
+    llvm::Type *LayoutType;
+    if (Size > 0 && Alignment > 0) {
       LayoutType =
           ArrayType::get(Type::getIntNTy(C, Alignment), Size * 8 / Alignment);
+    } else {
+      // LLVM expects variables that can be allocated to have an alignment and
+      // size. Default to using a 32-bit int as the layout type if none are
+      // present.
+      LayoutType = Type::getInt32Ty(C);
+    }
 
     return TargetTypeInfo(LayoutType, TargetExtType::CanBeGlobal,
                           TargetExtType::CanBeLocal);

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp

@@ -324,9 +324,6 @@ void SPIRVInstPrinter::printUnknownType(const MCInst *MI, raw_ostream &O) {
   const auto Enumerant = EnumOperand.getImm();
   const auto NumOps = MI->getNumOperands();
 
-  // Encode the instruction enumerant and word count into the opcode
-  const auto OpCode = (0xFF & NumOps) << 16 | (0xFF & Enumerant);
-
   // Print the opcode using the spirv-as unknown opcode syntax
   O << "OpUnknown(" << Enumerant << ", " << NumOps << ") ";
 

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp

@@ -111,10 +111,10 @@ void SPIRVMCCodeEmitter::encodeUnknownType(const MCInst &MI,
                                            SmallVectorImpl<char> &CB,
                                            SmallVectorImpl<MCFixup> &Fixups,
                                            const MCSubtargetInfo &STI) const {
-  // Encode the first 32 SPIR-V bytes with the number of args and the opcode.
+  // Encode the first 32 SPIR-V bits with the number of args and the opcode.
   const uint64_t OpCode = MI.getOperand(1).getImm();
   const uint32_t NumWords = MI.getNumOperands();
-  const uint32_t FirstWord = (0xFF & NumWords) << 16 | (0xFF & OpCode);
+  const uint32_t FirstWord = (0xFFFF & NumWords) << 16 | (0xFFFF & OpCode);
 
   // encoding: <opcode+len> <result type> [<operand0> <operand1> ...]
   support::endian::write(CB, FirstWord, llvm::endianness::little);

llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp

@@ -1414,18 +1414,22 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateUnknownType(
     return MIRBuilder.getMF().getRegInfo().getUniqueVRegDef(ResVReg);
   ResVReg = createTypeVReg(MIRBuilder);
 
-  MachineInstrBuilder MIB =
-      MIRBuilder.buildInstr(SPIRV::UNKNOWN_type).addDef(ResVReg).addImm(Opcode);
-  for (MCOperand Operand : Operands) {
-    if (Operand.isReg()) {
-      MIB.addUse(Operand.getReg());
-    } else if (Operand.isImm()) {
-      MIB.addImm(Operand.getImm());
+  DT.add(Ty, &MIRBuilder.getMF(), ResVReg);
+
+  return createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) {
+    MachineInstrBuilder MIB = MIRBuilder.buildInstr(SPIRV::UNKNOWN_type)
+                                  .addDef(ResVReg)
+                                  .addImm(Opcode);
+    for (MCOperand Operand : Operands) {
+      if (Operand.isReg()) {
+        MIB.addUse(Operand.getReg());
+      } else if (Operand.isImm()) {
+        MIB.addImm(Operand.getImm());
+      }
     }
-  }
 
-  DT.add(Ty, &MIRBuilder.getMF(), ResVReg);
-  return MIB;
+    return MIB;
+  });
 }
 
 const MachineInstr *

llvm/test/CodeGen/SPIRV/inline/type.coop-matrix.ll

@@ -0,0 +1,28 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
+
+; CHECK: [[float_t:%[0-9]+]] = OpTypeFloat 32
+; CHECK: [[uint32_t:%[0-9]+]] = OpTypeInt 32 0
+
+; CHECK: [[uint32_2:%[0-9]+]] = OpConstant [[uint32_t]] 2
+%scope = type target("spirv.IntegralConstant", i32, 2) ; Workgroup
+; CHECK: [[uint32_4:%[0-9]+]] = OpConstant [[uint32_t]] 4
+%cols = type target("spirv.IntegralConstant", i32, 4)
+%rows = type target("spirv.IntegralConstant", i32, 4)
+; CHECK: [[uint32_0:%[0-9]+]] = OpConstant [[uint32_t]] 0
+%use = type target("spirv.IntegralConstant", i32, 0) ; MatrixAKHR
+
+; CHECK: OpUnknown(4456, 7) [[coop_t:%[0-9]+]] [[float_t]] [[uint32_2]] [[uint32_4]] [[uint32_4]] [[uint32_0]]
+%coop_t = type target("spirv.Type", float, %scope, %rows, %cols, %use, 4456, 0, 0)
+
+; CHECK: [[getCooperativeMatrix_t:%[0-9]+]] = OpTypeFunction [[coop_t]]
+
+; CHECK: [[getCooperativeMatrix:%[0-9]+]] = OpFunction [[coop_t]] None [[getCooperativeMatrix_t]]
+declare %coop_t @getCooperativeMatrix()
+
+define void @main() #1 {
+entry:
+; CHECK: {{%[0-9]+}} = OpFunctionCall [[coop_t]] [[getCooperativeMatrix]]
+  %coop = call %coop_t @getCooperativeMatrix()
+
+  ret void
+}

llvm/test/CodeGen/SPIRV/inline/type.ll

@@ -16,11 +16,10 @@
 ; CHECK: OpUnknown(28, 4) [[array_t:%[0-9]+]] [[image_t]] [[uint32_4]]
 %ArrayTex2D = type target("spirv.Type", %type_2d_image, %integral_constant_4, 28, 0, 0)
 
-; CHECK: [[getTexArray_t:%[0-9]+]] = OpTypeFunction [[array_t]]
-
 ; CHECK: OpUnknown(21, 4) [[int_t:%[0-9]+]] 32 1
 %int_t = type target("spirv.Type", %literal_32, %literal_true, 21, 0, 0)
 
+; CHECK: [[getTexArray_t:%[0-9]+]] = OpTypeFunction [[array_t]]
 ; CHECK: [[getInt_t:%[0-9]+]] = OpTypeFunction [[int_t]]
 
 ; CHECK: [[getTexArray:%[0-9]+]] = OpFunction [[array_t]] None [[getTexArray_t]]
@@ -31,8 +30,6 @@ declare %int_t @getInt()
 
 define void @main() #1 {
 entry:
-  %images = alloca %ArrayTex2D
-
 ; CHECK: {{%[0-9]+}} = OpFunctionCall [[array_t]] [[getTexArray]]
   %retTex = call %ArrayTex2D @getTexArray()