Skip to content

Commit 7cd9e4e

Browse files
s-barannikovs-barannikov
committed
[AArch64] Remove unused SDNodes (NFC)
The corresponding enum members were only used by `EmitMOPS`, which immediately translated them to machine opcodes.
1 parent 9685681 commit 7cd9e4e

File tree

5 files changed

+23
-55
lines changed

5 files changed

+23
-55
lines changed

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp‎

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2943,10 +2943,6 @@ const char *AArch64TargetLowering::getTargetNodeName(unsigned Opcode) const {
29432943
MAKE_CASE(AArch64ISD::UADDLP)
29442944
MAKE_CASE(AArch64ISD::CALL_RVMARKER)
29452945
MAKE_CASE(AArch64ISD::ASSERT_ZEXT_BOOL)
2946-
MAKE_CASE(AArch64ISD::MOPS_MEMSET)
2947-
MAKE_CASE(AArch64ISD::MOPS_MEMSET_TAGGING)
2948-
MAKE_CASE(AArch64ISD::MOPS_MEMCOPY)
2949-
MAKE_CASE(AArch64ISD::MOPS_MEMMOVE)
29502946
MAKE_CASE(AArch64ISD::CALL_BTI)
29512947
MAKE_CASE(AArch64ISD::MRRS)
29522948
MAKE_CASE(AArch64ISD::MSRR)
@@ -5921,9 +5917,9 @@ SDValue AArch64TargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,
59215917

59225918
const auto &SDI =
59235919
static_cast<const AArch64SelectionDAGInfo &>(DAG.getSelectionDAGInfo());
5924-
SDValue MS =
5925-
SDI.EmitMOPS(AArch64ISD::MOPS_MEMSET_TAGGING, DAG, DL, Chain, Dst, Val,
5926-
Size, Alignment, IsVol, DstPtrInfo, MachinePointerInfo{});
5920+
SDValue MS = SDI.EmitMOPS(AArch64::MOPSMemorySetTaggingPseudo, DAG, DL,
5921+
Chain, Dst, Val, Size, Alignment, IsVol,
5922+
DstPtrInfo, MachinePointerInfo{});
59275923

59285924
// MOPS_MEMSET_TAGGING has 3 results (DstWb, SizeWb, Chain) whereas the
59295925
// intrinsic has 2. So hide SizeWb using MERGE_VALUES. Otherwise

‎llvm/lib/Target/AArch64/AArch64ISelLowering.h‎

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -514,12 +514,6 @@ enum NodeType : unsigned {
514514
STP,
515515
STILP,
516516
STNP,
517-
518-
// Memory Operations
519-
MOPS_MEMSET,
520-
MOPS_MEMSET_TAGGING,
521-
MOPS_MEMCOPY,
522-
MOPS_MEMMOVE,
523517
};
524518

525519
} // end namespace AArch64ISD

‎llvm/lib/Target/AArch64/AArch64InstrInfo.td‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -10077,14 +10077,6 @@ let Predicates = [HasMOPS, HasMTE] in {
1007710077
}
1007810078
}
1007910079

10080-
// MOPS Node operands: 0: Dst, 1: Src or Value, 2: Size, 3: Chain
10081-
// MOPS Node results: 0: Dst writeback, 1: Size writeback, 2: Chain
10082-
def SDT_AArch64mops : SDTypeProfile<2, 3, [ SDTCisInt<0>, SDTCisInt<1>, SDTCisInt<2> ]>;
10083-
def AArch64mops_memset : SDNode<"AArch64ISD::MOPS_MEMSET", SDT_AArch64mops>;
10084-
def AArch64mops_memset_tagging : SDNode<"AArch64ISD::MOPS_MEMSET_TAGGING", SDT_AArch64mops>;
10085-
def AArch64mops_memcopy : SDNode<"AArch64ISD::MOPS_MEMCOPY", SDT_AArch64mops>;
10086-
def AArch64mops_memmove : SDNode<"AArch64ISD::MOPS_MEMMOVE", SDT_AArch64mops>;
10087-
1008810080
// MOPS operations always contain three 4-byte instructions
1008910081
let Predicates = [HasMOPS], Defs = [NZCV], Size = 12, mayStore = 1 in {
1009010082
let mayLoad = 1 in {

‎llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp‎

Lines changed: 16 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -23,11 +23,11 @@ static cl::opt<bool>
2323
"to lower to librt functions"),
2424
cl::init(true));
2525

26-
SDValue AArch64SelectionDAGInfo::EmitMOPS(AArch64ISD::NodeType SDOpcode,
27-
SelectionDAG &DAG, const SDLoc &DL,
28-
SDValue Chain, SDValue Dst,
29-
SDValue SrcOrValue, SDValue Size,
30-
Align Alignment, bool isVolatile,
26+
SDValue AArch64SelectionDAGInfo::EmitMOPS(unsigned Opcode, SelectionDAG &DAG,
27+
const SDLoc &DL, SDValue Chain,
28+
SDValue Dst, SDValue SrcOrValue,
29+
SDValue Size, Align Alignment,
30+
bool isVolatile,
3131
MachinePointerInfo DstPtrInfo,
3232
MachinePointerInfo SrcPtrInfo) const {
3333

@@ -36,23 +36,8 @@ SDValue AArch64SelectionDAGInfo::EmitMOPS(AArch64ISD::NodeType SDOpcode,
3636
if (auto *C = dyn_cast<ConstantSDNode>(Size))
3737
ConstSize = C->getZExtValue();
3838

39-
const bool IsSet = SDOpcode == AArch64ISD::MOPS_MEMSET ||
40-
SDOpcode == AArch64ISD::MOPS_MEMSET_TAGGING;
41-
42-
const auto MachineOpcode = [&]() {
43-
switch (SDOpcode) {
44-
case AArch64ISD::MOPS_MEMSET:
45-
return AArch64::MOPSMemorySetPseudo;
46-
case AArch64ISD::MOPS_MEMSET_TAGGING:
47-
return AArch64::MOPSMemorySetTaggingPseudo;
48-
case AArch64ISD::MOPS_MEMCOPY:
49-
return AArch64::MOPSMemoryCopyPseudo;
50-
case AArch64ISD::MOPS_MEMMOVE:
51-
return AArch64::MOPSMemoryMovePseudo;
52-
default:
53-
llvm_unreachable("Unhandled MOPS ISD Opcode");
54-
}
55-
}();
39+
const bool IsSet = Opcode == AArch64::MOPSMemorySetPseudo ||
40+
Opcode == AArch64::MOPSMemorySetTaggingPseudo;
5641

5742
MachineFunction &MF = DAG.getMachineFunction();
5843

@@ -68,13 +53,13 @@ SDValue AArch64SelectionDAGInfo::EmitMOPS(AArch64ISD::NodeType SDOpcode,
6853
SrcOrValue = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, SrcOrValue);
6954
SDValue Ops[] = {Dst, Size, SrcOrValue, Chain};
7055
const EVT ResultTys[] = {MVT::i64, MVT::i64, MVT::Other};
71-
MachineSDNode *Node = DAG.getMachineNode(MachineOpcode, DL, ResultTys, Ops);
56+
MachineSDNode *Node = DAG.getMachineNode(Opcode, DL, ResultTys, Ops);
7257
DAG.setNodeMemRefs(Node, {DstOp});
7358
return SDValue(Node, 2);
7459
} else {
7560
SDValue Ops[] = {Dst, SrcOrValue, Size, Chain};
7661
const EVT ResultTys[] = {MVT::i64, MVT::i64, MVT::i64, MVT::Other};
77-
MachineSDNode *Node = DAG.getMachineNode(MachineOpcode, DL, ResultTys, Ops);
62+
MachineSDNode *Node = DAG.getMachineNode(Opcode, DL, ResultTys, Ops);
7863

7964
auto SrcFlags = MachineMemOperand::MOLoad | Vol;
8065
auto *SrcOp =
@@ -150,8 +135,8 @@ SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemcpy(
150135
DAG.getMachineFunction().getSubtarget<AArch64Subtarget>();
151136

152137
if (STI.hasMOPS())
153-
return EmitMOPS(AArch64ISD::MOPS_MEMCOPY, DAG, DL, Chain, Dst, Src, Size,
154-
Alignment, isVolatile, DstPtrInfo, SrcPtrInfo);
138+
return EmitMOPS(AArch64::MOPSMemoryCopyPseudo, DAG, DL, Chain, Dst, Src,
139+
Size, Alignment, isVolatile, DstPtrInfo, SrcPtrInfo);
155140

156141
SMEAttrs Attrs(DAG.getMachineFunction().getFunction());
157142
if (LowerToSMERoutines && !Attrs.hasNonStreamingInterfaceAndBody())
@@ -168,8 +153,9 @@ SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemset(
168153
DAG.getMachineFunction().getSubtarget<AArch64Subtarget>();
169154

170155
if (STI.hasMOPS())
171-
return EmitMOPS(AArch64ISD::MOPS_MEMSET, DAG, dl, Chain, Dst, Src, Size,
172-
Alignment, isVolatile, DstPtrInfo, MachinePointerInfo{});
156+
return EmitMOPS(AArch64::MOPSMemorySetPseudo, DAG, dl, Chain, Dst, Src,
157+
Size, Alignment, isVolatile, DstPtrInfo,
158+
MachinePointerInfo{});
173159

174160
SMEAttrs Attrs(DAG.getMachineFunction().getFunction());
175161
if (LowerToSMERoutines && !Attrs.hasNonStreamingInterfaceAndBody())
@@ -186,8 +172,8 @@ SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemmove(
186172
DAG.getMachineFunction().getSubtarget<AArch64Subtarget>();
187173

188174
if (STI.hasMOPS())
189-
return EmitMOPS(AArch64ISD::MOPS_MEMMOVE, DAG, dl, Chain, Dst, Src, Size,
190-
Alignment, isVolatile, DstPtrInfo, SrcPtrInfo);
175+
return EmitMOPS(AArch64::MOPSMemoryMovePseudo, DAG, dl, Chain, Dst, Src,
176+
Size, Alignment, isVolatile, DstPtrInfo, SrcPtrInfo);
191177

192178
SMEAttrs Attrs(DAG.getMachineFunction().getFunction());
193179
if (LowerToSMERoutines && !Attrs.hasNonStreamingInterfaceAndBody())

‎llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -19,10 +19,10 @@ namespace llvm {
1919

2020
class AArch64SelectionDAGInfo : public SelectionDAGTargetInfo {
2121
public:
22-
SDValue EmitMOPS(AArch64ISD::NodeType SDOpcode, SelectionDAG &DAG,
23-
const SDLoc &DL, SDValue Chain, SDValue Dst,
24-
SDValue SrcOrValue, SDValue Size, Align Alignment,
25-
bool isVolatile, MachinePointerInfo DstPtrInfo,
22+
SDValue EmitMOPS(unsigned Opcode, SelectionDAG &DAG, const SDLoc &DL,
23+
SDValue Chain, SDValue Dst, SDValue SrcOrValue, SDValue Size,
24+
Align Alignment, bool isVolatile,
25+
MachinePointerInfo DstPtrInfo,
2626
MachinePointerInfo SrcPtrInfo) const;
2727

2828
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,

0 commit comments

Comments
 (0)