@@ -198,7 +198,7 @@ static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) {
198198 return (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall);
199199}
200200
201- void CCState::getRemainingRegParmsForType (SmallVectorImpl<MCPhysReg > &Regs,
201+ void CCState::getRemainingRegParmsForType (SmallVectorImpl<MCRegister > &Regs,
202202 MVT VT, CCAssignFn Fn) {
203203 uint64_t SavedStackSize = StackSize;
204204 Align SavedMaxStackArgAlign = MaxStackArgAlign;
@@ -227,7 +227,7 @@ void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
227227 assert (NumLocs < Locs.size () && " CC assignment failed to add location" );
228228 for (unsigned I = NumLocs, E = Locs.size (); I != E; ++I)
229229 if (Locs[I].isRegLoc ())
230- Regs.push_back (MCPhysReg ( Locs[I].getLocReg () ));
230+ Regs.push_back (Locs[I].getLocReg ());
231231
232232 // Clear the assigned values and stack memory. We leave the registers marked
233233 // as allocated so that future queries don't return the same registers, i.e.
@@ -247,11 +247,11 @@ void CCState::analyzeMustTailForwardedRegisters(
247247 SaveAndRestore SavedMustTail (AnalyzingMustTailForwardedRegs, true );
248248
249249 for (MVT RegVT : RegParmTypes) {
250- SmallVector<MCPhysReg , 8 > RemainingRegs;
250+ SmallVector<MCRegister , 8 > RemainingRegs;
251251 getRemainingRegParmsForType (RemainingRegs, RegVT, Fn);
252252 const TargetLowering *TL = MF.getSubtarget ().getTargetLowering ();
253253 const TargetRegisterClass *RC = TL->getRegClassFor (RegVT);
254- for (MCPhysReg PReg : RemainingRegs) {
254+ for (MCRegister PReg : RemainingRegs) {
255255 Register VReg = MF.addLiveIn (PReg, RC);
256256 Forwards.push_back (ForwardedRegister (VReg, PReg, RegVT));
257257 }
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