@@ -403,12 +403,14 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
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Legal);
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}
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- if (Subtarget.hasStdExtZbb() ||
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- (Subtarget.hasVendorXCVbitmanip() && !Subtarget.is64Bit())) {
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+ if (Subtarget.hasCTZLike()) {
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if (Subtarget.is64Bit())
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setOperationAction({ISD::CTTZ, ISD::CTTZ_ZERO_UNDEF}, MVT::i32, Custom);
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} else {
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setOperationAction(ISD::CTTZ, XLenVT, Expand);
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+ }
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+
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+ if (!Subtarget.hasCPOPLike()) {
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// TODO: These should be set to LibCall, but this currently breaks
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// the Linux kernel build. See #101786. Lacks i128 tests, too.
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if (Subtarget.is64Bit())
@@ -418,8 +420,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
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setOperationAction(ISD::CTPOP, MVT::i64, Expand);
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}
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- if (Subtarget.hasStdExtZbb() || Subtarget.hasVendorXTHeadBb() ||
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- (Subtarget.hasVendorXCVbitmanip() && !Subtarget.is64Bit())) {
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+ if (Subtarget.hasCLZLike()) {
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// We need the custom lowering to make sure that the resulting sequence
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// for the 32bit case is efficient on 64bit targets.
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// Use default promotion for i32 without Zbb.
@@ -2158,13 +2159,11 @@ bool RISCVTargetLowering::signExtendConstant(const ConstantInt *CI) const {
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}
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bool RISCVTargetLowering::isCheapToSpeculateCttz(Type *Ty) const {
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- return Subtarget.hasStdExtZbb() ||
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- (Subtarget.hasVendorXCVbitmanip() && !Subtarget.is64Bit());
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+ return Subtarget.hasCTZLike();
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}
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bool RISCVTargetLowering::isCheapToSpeculateCtlz(Type *Ty) const {
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- return Subtarget.hasStdExtZbb() || Subtarget.hasVendorXTHeadBb() ||
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- (Subtarget.hasVendorXCVbitmanip() && !Subtarget.is64Bit());
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+ return Subtarget.hasCLZLike();
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}
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bool RISCVTargetLowering::isMaskAndCmp0FoldingBeneficial(
@@ -24843,6 +24842,7 @@ bool RISCVTargetLowering::isCtpopFast(EVT VT) const {
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return isTypeLegal(VT) && Subtarget.hasStdExtZvbb();
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if (VT.isFixedLengthVector() && Subtarget.hasStdExtZvbb())
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return true;
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+ // FIXME: Should use hasCPOPLike here.
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return Subtarget.hasStdExtZbb() &&
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(VT == MVT::i32 || VT == MVT::i64 || VT.isFixedLengthVector());
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}
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