Skip to content

Commit 7d249cf

Browse files
authored
[RISCV] Add helper functions to detect CLZ/CTZ/CPOP-like support. (#158148)
1 parent 6272540 commit 7d249cf

File tree

2 files changed

+19
-8
lines changed

2 files changed

+19
-8
lines changed

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -403,12 +403,14 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
403403
Legal);
404404
}
405405

406-
if (Subtarget.hasStdExtZbb() ||
407-
(Subtarget.hasVendorXCVbitmanip() && !Subtarget.is64Bit())) {
406+
if (Subtarget.hasCTZLike()) {
408407
if (Subtarget.is64Bit())
409408
setOperationAction({ISD::CTTZ, ISD::CTTZ_ZERO_UNDEF}, MVT::i32, Custom);
410409
} else {
411410
setOperationAction(ISD::CTTZ, XLenVT, Expand);
411+
}
412+
413+
if (!Subtarget.hasCPOPLike()) {
412414
// TODO: These should be set to LibCall, but this currently breaks
413415
// the Linux kernel build. See #101786. Lacks i128 tests, too.
414416
if (Subtarget.is64Bit())
@@ -418,8 +420,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
418420
setOperationAction(ISD::CTPOP, MVT::i64, Expand);
419421
}
420422

421-
if (Subtarget.hasStdExtZbb() || Subtarget.hasVendorXTHeadBb() ||
422-
(Subtarget.hasVendorXCVbitmanip() && !Subtarget.is64Bit())) {
423+
if (Subtarget.hasCLZLike()) {
423424
// We need the custom lowering to make sure that the resulting sequence
424425
// for the 32bit case is efficient on 64bit targets.
425426
// Use default promotion for i32 without Zbb.
@@ -2158,13 +2159,11 @@ bool RISCVTargetLowering::signExtendConstant(const ConstantInt *CI) const {
21582159
}
21592160

21602161
bool RISCVTargetLowering::isCheapToSpeculateCttz(Type *Ty) const {
2161-
return Subtarget.hasStdExtZbb() ||
2162-
(Subtarget.hasVendorXCVbitmanip() && !Subtarget.is64Bit());
2162+
return Subtarget.hasCTZLike();
21632163
}
21642164

21652165
bool RISCVTargetLowering::isCheapToSpeculateCtlz(Type *Ty) const {
2166-
return Subtarget.hasStdExtZbb() || Subtarget.hasVendorXTHeadBb() ||
2167-
(Subtarget.hasVendorXCVbitmanip() && !Subtarget.is64Bit());
2166+
return Subtarget.hasCLZLike();
21682167
}
21692168

21702169
bool RISCVTargetLowering::isMaskAndCmp0FoldingBeneficial(
@@ -24843,6 +24842,7 @@ bool RISCVTargetLowering::isCtpopFast(EVT VT) const {
2484324842
return isTypeLegal(VT) && Subtarget.hasStdExtZvbb();
2484424843
if (VT.isFixedLengthVector() && Subtarget.hasStdExtZvbb())
2484524844
return true;
24845+
// FIXME: Should use hasCPOPLike here.
2484624846
return Subtarget.hasStdExtZbb() &&
2484724847
(VT == MVT::i32 || VT == MVT::i64 || VT.isFixedLengthVector());
2484824848
}

llvm/lib/Target/RISCV/RISCVSubtarget.h

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -186,6 +186,17 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
186186
return HasStdExtZfhmin || HasStdExtZfbfmin;
187187
}
188188

189+
bool hasCLZLike() const {
190+
return HasStdExtZbb || HasVendorXTHeadBb ||
191+
(HasVendorXCVbitmanip && !IsRV64);
192+
}
193+
bool hasCTZLike() const {
194+
return HasStdExtZbb || (HasVendorXCVbitmanip && !IsRV64);
195+
}
196+
bool hasCPOPLike() const {
197+
return HasStdExtZbb || (HasVendorXCVbitmanip && !IsRV64);
198+
}
199+
189200
bool hasBEXTILike() const { return HasStdExtZbs || HasVendorXTHeadBs; }
190201

191202
bool hasCZEROLike() const {

0 commit comments

Comments
 (0)