@@ -19087,7 +19087,7 @@ static bool CC_RISCVAssign2XLen(unsigned XLen, CCState &State, CCValAssign VA1,
1908719087 State.getMachineFunction().getSubtarget<RISCVSubtarget>();
1908819088 ArrayRef<MCPhysReg> ArgGPRs = RISCV::getArgGPRs(STI.getTargetABI());
1908919089
19090- if (Register Reg = State.AllocateReg(ArgGPRs)) {
19090+ if (MCRegister Reg = State.AllocateReg(ArgGPRs)) {
1909119091 // At least one half can be passed via register.
1909219092 State.addLoc(CCValAssign::getReg(VA1.getValNo(), VA1.getValVT(), Reg,
1909319093 VA1.getLocVT(), CCValAssign::Full));
@@ -19108,7 +19108,7 @@ static bool CC_RISCVAssign2XLen(unsigned XLen, CCState &State, CCValAssign VA1,
1910819108 return false;
1910919109 }
1911019110
19111- if (Register Reg = State.AllocateReg(ArgGPRs)) {
19111+ if (MCRegister Reg = State.AllocateReg(ArgGPRs)) {
1911219112 // The second half can also be passed via register.
1911319113 State.addLoc(
1911419114 CCValAssign::getReg(ValNo2, ValVT2, Reg, LocVT2, CCValAssign::Full));
@@ -19230,7 +19230,7 @@ bool RISCV::CC_RISCV(const DataLayout &DL, RISCVABI::ABI ABI, unsigned ValNo,
1923019230
1923119231 if (UseGPRForF16_F32 && (ValVT == MVT::f16 || ValVT == MVT::bf16 ||
1923219232 (ValVT == MVT::f32 && XLen == 64))) {
19233- Register Reg = State.AllocateReg(ArgGPRs);
19233+ MCRegister Reg = State.AllocateReg(ArgGPRs);
1923419234 if (Reg) {
1923519235 LocVT = XLenVT;
1923619236 State.addLoc(
@@ -19283,7 +19283,7 @@ bool RISCV::CC_RISCV(const DataLayout &DL, RISCVABI::ABI ABI, unsigned ValNo,
1928319283 // GPRs, split between a GPR and the stack, or passed completely on the
1928419284 // stack. LowerCall/LowerFormalArguments/LowerReturn must recognise these
1928519285 // cases.
19286- Register Reg = State.AllocateReg(ArgGPRs);
19286+ MCRegister Reg = State.AllocateReg(ArgGPRs);
1928719287 if (!Reg) {
1928819288 unsigned StackOffset = State.AllocateStack(8, Align(8));
1928919289 State.addLoc(
@@ -19292,7 +19292,7 @@ bool RISCV::CC_RISCV(const DataLayout &DL, RISCVABI::ABI ABI, unsigned ValNo,
1929219292 }
1929319293 LocVT = MVT::i32;
1929419294 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
19295- Register HiReg = State.AllocateReg(ArgGPRs);
19295+ MCRegister HiReg = State.AllocateReg(ArgGPRs);
1929619296 if (HiReg) {
1929719297 State.addLoc(
1929819298 CCValAssign::getCustomReg(ValNo, ValVT, HiReg, LocVT, LocInfo));
@@ -19340,7 +19340,7 @@ bool RISCV::CC_RISCV(const DataLayout &DL, RISCVABI::ABI ABI, unsigned ValNo,
1934019340 }
1934119341
1934219342 // Allocate to a register if possible, or else a stack slot.
19343- Register Reg;
19343+ MCRegister Reg;
1934419344 unsigned StoreSizeBytes = XLen / 8;
1934519345 Align StackAlign = Align(XLen / 8);
1934619346
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