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[RISCV] Support Remaining P Extension Instructions for RV32/64
This patch implements pages 15-17 from jhauser.us/RISCV/ext-P/RVP-instrEncodings-015.pdf Documentation: https://jhauser.us/RISCV/ext-P/RVP-baseInstrs-014.pdf https://jhauser.us/RISCV/ext-P/RVP-instrEncodings-015.pdf
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clang/test/Driver/print-supported-extensions-riscv.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -209,7 +209,7 @@
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// CHECK-NEXT: xwchc 2.2 'Xwchc' (WCH/QingKe additional compressed opcodes)
210210
// CHECK-EMPTY:
211211
// CHECK-NEXT: Experimental extensions
212-
// CHECK-NEXT: p 0.14 'P' ('Base P' (Packed SIMD))
212+
// CHECK-NEXT: p 0.15 'P' ('Base P' (Packed SIMD))
213213
// CHECK-NEXT: zicfilp 1.0 'Zicfilp' (Landing pad)
214214
// CHECK-NEXT: zicfiss 1.0 'Zicfiss' (Shadow stack)
215215
// CHECK-NEXT: zalasr 0.1 'Zalasr' (Load-Acquire and Store-Release Instructions)

llvm/lib/Target/RISCV/RISCVFeatures.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1069,7 +1069,7 @@ def HasStdExtSmctrOrSsctr : Predicate<"Subtarget->hasStdExtSmctrOrSsctr()">,
10691069

10701070
// Packed SIMD Extensions
10711071
def FeatureStdExtP
1072-
: RISCVExperimentalExtension<0, 14,
1072+
: RISCVExperimentalExtension<0, 15,
10731073
"'Base P' (Packed SIMD)">;
10741074
def HasStdExtP : Predicate<"Subtarget->hasStdExtP()">,
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AssemblerPredicate<(all_of FeatureStdExtP),

llvm/lib/Target/RISCV/RISCVInstrInfoP.td

Lines changed: 201 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -578,3 +578,204 @@ let Predicates = [HasStdExtP, IsRV64] in {
578578
def PPACKT_W : RVPBinary_rr<0b0110, 0b01, 0b100, "ppackt.w">;
579579
def PACKT_RV64 : RVPBinary_rr<0b0110, 0b11, 0b100, "packt">;
580580
} // Predicates = [HasStdExtP, IsRV64]
581+
let Predicates = [HasStdExtP] in {
582+
def PM2ADD_H : RVPBinary_rr<0b0000, 0b00, 0b101, "pm2add.h">;
583+
def PM4ADD_B : RVPBinary_rr<0b0000, 0b10, 0b101, "pm4add.b">;
584+
def PM2ADDA_H : RVPBinary_rr<0b0001, 0b00, 0b101, "pm2adda.h">;
585+
def PM4ADDA_B : RVPBinary_rr<0b0001, 0b10, 0b101, "pm4adda.b">;
586+
def PM2ADD_HX : RVPBinary_rr<0b0010, 0b00, 0b101, "pm2add.hx">;
587+
def PM2ADDA_HX : RVPBinary_rr<0b0011, 0b00, 0b101, "pm2adda.hx">;
588+
589+
def PM2ADDU_H : RVPBinary_rr<0b0100, 0b00, 0b101, "pm2addu.h">;
590+
def PM4ADDU_B : RVPBinary_rr<0b0100, 0b10, 0b101, "pm4addu.b">;
591+
def PM2ADDAU_H : RVPBinary_rr<0b0101, 0b00, 0b101, "pm2addau.h">;
592+
def PM4ADDAU_B : RVPBinary_rr<0b0101, 0b10, 0b101, "pm4addau.b">;
593+
def PMQ2ADD_H : RVPBinary_rr<0b0110, 0b00, 0b101, "pmq2add.h">;
594+
def PMQR2ADD_H : RVPBinary_rr<0b0110, 0b10, 0b101, "pmqr2add.h">;
595+
def PMQ2ADDA_H : RVPBinary_rr<0b0111, 0b00, 0b101, "pmq2adda.h">;
596+
def PMQR2ADDA_H : RVPBinary_rr<0b0111, 0b10, 0b101, "pmqr2adda.h">;
597+
598+
def PM2SUB_H : RVPBinary_rr<0b1000, 0b00, 0b101, "pm2sub.h">;
599+
def PM2SADD_H : RVPBinary_rr<0b1000, 0b10, 0b101, "pm2sadd.h">;
600+
def PM2SUBA_H : RVPBinary_rr<0b1001, 0b00, 0b101, "pm2suba.h">;
601+
def PM2SUB_HX : RVPBinary_rr<0b1010, 0b00, 0b101, "pm2sub.hx">;
602+
def PM2SADD_HX : RVPBinary_rr<0b1010, 0b10, 0b101, "pm2sadd.hx">;
603+
def PM2SUBA_HX : RVPBinary_rr<0b1011, 0b00, 0b101, "pm2suba.hx">;
604+
605+
def PM2ADDSU_H : RVPBinary_rr<0b1100, 0b00, 0b101, "pm2addsu.h">;
606+
def PM4ADDSU_B : RVPBinary_rr<0b1100, 0b10, 0b101, "pm4addsu.b">;
607+
def PM2ADDASU_H : RVPBinary_rr<0b1101, 0b00, 0b101, "pm2addasu.h">;
608+
def PM4ADDASU_B : RVPBinary_rr<0b1101, 0b10, 0b101, "pm4addasu.b">;
609+
} // Predicates = [HasStdExtP]
610+
let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
611+
def MQACC_H01 : RVPBinary_rr<0b1111, 0b00, 0b101, "mqacc.h01">;
612+
def MQRACC_H01 : RVPBinary_rr<0b1111, 0b10, 0b101, "mqracc.h01">;
613+
} // // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only"
614+
let Predicates = [HasStdExtP, IsRV64] in {
615+
def PM2ADD_W : RVPBinary_rr<0b0000, 0b01, 0b101, "pm2add.w">;
616+
def PM4ADD_H : RVPBinary_rr<0b0000, 0b11, 0b101, "pm4add.h">;
617+
def PM2ADDA_W : RVPBinary_rr<0b0001, 0b01, 0b101, "pm2adda.w">;
618+
def PM4ADDA_H : RVPBinary_rr<0b0001, 0b11, 0b101, "pm4adda.h">;
619+
def PM2ADD_WX : RVPBinary_rr<0b0010, 0b01, 0b101, "pm2add.wx">;
620+
def PM2ADDA_WX : RVPBinary_rr<0b0011, 0b01, 0b101, "pm2adda.wx">;
621+
622+
def PM2ADDU_W : RVPBinary_rr<0b0100, 0b01, 0b101, "pm2addu.w">;
623+
def PM4ADDU_H : RVPBinary_rr<0b0100, 0b11, 0b101, "pm4addu.h">;
624+
def PM2ADDAU_W : RVPBinary_rr<0b0101, 0b01, 0b101, "pm2addau.w">;
625+
def PM4ADDAU_H : RVPBinary_rr<0b0101, 0b11, 0b101, "pm4addau.h">;
626+
def PMQ2ADD_W : RVPBinary_rr<0b0110, 0b01, 0b101, "pmq2add.w">;
627+
def PMQR2ADD_W : RVPBinary_rr<0b0110, 0b11, 0b101, "pmqr2add.w">;
628+
def PMQ2ADDA_W : RVPBinary_rr<0b0111, 0b01, 0b101, "pmq2adda.w">;
629+
def PMQR2ADDA_W : RVPBinary_rr<0b0111, 0b11, 0b101, "pmqr2adda.w">;
630+
631+
def PM2SUB_W : RVPBinary_rr<0b1000, 0b01, 0b101, "pm2sub.w">;
632+
def PM2SUBA_W : RVPBinary_rr<0b1001, 0b01, 0b101, "pm2suba.w">;
633+
def PM2SUB_WX : RVPBinary_rr<0b1010, 0b01, 0b101, "pm2sub.wx">;
634+
def PM2SUBA_WX : RVPBinary_rr<0b1011, 0b01, 0b101, "pm2suba.wx">;
635+
636+
def PM2ADDSU_W : RVPBinary_rr<0b1100, 0b01, 0b101, "pm2addsu.w">;
637+
def PM4ADDSU_H : RVPBinary_rr<0b1100, 0b11, 0b101, "pm4addsu.h">;
638+
def PM2ADDASU_W : RVPBinary_rr<0b1101, 0b01, 0b101, "pm2addasu.w">;
639+
def PM4ADDASU_H : RVPBinary_rr<0b1101, 0b11, 0b101, "pm4addasu.h">;
640+
641+
def PMQACC_W_H01 : RVPBinary_rr<0b1111, 0b00, 0b101, "pmqacc.w.h01">;
642+
def MQACC_W01 : RVPBinary_rr<0b1111, 0b01, 0b101, "mqacc.w01">;
643+
def PMQRACC_W_H01 : RVPBinary_rr<0b1111, 0b10, 0b101, "pmqracc.w.h01">;
644+
def MQRACC_W01 : RVPBinary_rr<0b1111, 0b11, 0b101, "mqracc.w01">;
645+
} // Predicates = [HasStdExtP, IsRV64]
646+
let Predicates = [HasStdExtP] in {
647+
def PAS_HX : RVPBinary_rr<0b0000, 0b00, 0b110, "pas.hx">;
648+
def PSA_HX : RVPBinary_rr<0b0000, 0b10, 0b110, "psa.hx">;
649+
def PSAS_HX : RVPBinary_rr<0b0010, 0b00, 0b110, "psas.hx">;
650+
def PSSA_HX : RVPBinary_rr<0b0010, 0b10, 0b110, "pssa.hx">;
651+
652+
def PMSEQ_H : RVPBinary_rr<0b1000, 0b00, 0b110, "pmseq.h">;
653+
def PMSEQ_B : RVPBinary_rr<0b1000, 0b10, 0b110, "pmseq.b">;
654+
def PMSLT_H : RVPBinary_rr<0b1010, 0b00, 0b110, "pmslt.h">;
655+
def PMSLT_B : RVPBinary_rr<0b1010, 0b10, 0b110, "pmslt.b">;
656+
def PMSLTU_H : RVPBinary_rr<0b1011, 0b00, 0b110, "pmsltu.h">;
657+
def PMSLTU_B : RVPBinary_rr<0b1011, 0b10, 0b110, "pmsltu.b">;
658+
659+
def PMIN_H : RVPBinary_rr<0b1100, 0b00, 0b110, "pmin.h">;
660+
def PMIN_B : RVPBinary_rr<0b1100, 0b10, 0b110, "pmin.b">;
661+
def PMINU_H : RVPBinary_rr<0b1101, 0b00, 0b110, "pminu.h">;
662+
def PMINU_B : RVPBinary_rr<0b1101, 0b10, 0b110, "pminu.b">;
663+
def PMAX_H : RVPBinary_rr<0b1110, 0b00, 0b110, "pmax.h">;
664+
def PMAX_B : RVPBinary_rr<0b1110, 0b10, 0b110, "pmax.b">;
665+
def PMAXU_H : RVPBinary_rr<0b1111, 0b00, 0b110, "pmaxu.h">;
666+
def PMAXU_B : RVPBinary_rr<0b1111, 0b10, 0b110, "pmaxu.b">;
667+
} // Predicates = [HasStdExtP]
668+
let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
669+
def MSEQ : RVPBinary_rr<0b1000, 0b01, 0b110, "mseq">;
670+
def MSLT : RVPBinary_rr<0b1010, 0b01, 0b110, "mslt">;
671+
def MSLTU : RVPBinary_rr<0b1011, 0b01, 0b110, "msltu">;
672+
} // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only"
673+
let Predicates = [HasStdExtP, IsRV64] in {
674+
def PAS_WX : RVPBinary_rr<0b0000, 0b01, 0b110, "pas.wx">;
675+
def PSA_WX : RVPBinary_rr<0b0000, 0b11, 0b110, "psa.wx">;
676+
def PSAS_WX : RVPBinary_rr<0b0010, 0b01, 0b110, "psas.wx">;
677+
def PSSA_WX : RVPBinary_rr<0b0010, 0b11, 0b110, "pssa.wx">;
678+
def PAAS_WX : RVPBinary_rr<0b0011, 0b01, 0b110, "paas.wx">;
679+
def PASA_WX : RVPBinary_rr<0b0011, 0b11, 0b110, "pasa.wx">;
680+
681+
def PMSEQ_W : RVPBinary_rr<0b1000, 0b01, 0b110, "pmseq.w">;
682+
def PMSLT_W : RVPBinary_rr<0b1010, 0b01, 0b110, "pmslt.w">;
683+
def PMSLTU_W : RVPBinary_rr<0b1011, 0b01, 0b110, "pmsltu.w">;
684+
685+
def PMIN_W : RVPBinary_rr<0b1100, 0b01, 0b110, "pmin.w">;
686+
def PMINU_W : RVPBinary_rr<0b1101, 0b01, 0b110, "pminu.w">;
687+
def PMAX_W : RVPBinary_rr<0b1110, 0b01, 0b110, "pmax.w">;
688+
def PMAXU_W : RVPBinary_rr<0b1111, 0b01, 0b110, "pmaxu.w">;
689+
} // Predicates = [HasStdExtP, IsRV64]
690+
691+
692+
let Predicates = [HasStdExtP] in {
693+
def PMULH_H : RVPBinary_rr<0b0000, 0b00, 0b111, "pmulh.h">;
694+
def PMULHR_H : RVPBinary_rr<0b0000, 0b10, 0b111, "pmulhr.h">;
695+
def PMHACC_H : RVPBinary_rr<0b0001, 0b00, 0b111, "pmhacc.h">;
696+
def PMHRACC_H : RVPBinary_rr<0b0001, 0b10, 0b111, "pmhracc.h">;
697+
def PMULHU_H : RVPBinary_rr<0b0010, 0b00, 0b111, "pmulhu.h">;
698+
def PMULHRU_H : RVPBinary_rr<0b0010, 0b10, 0b111, "pmulhru.h">;
699+
def PMHACCU_H : RVPBinary_rr<0b0011, 0b00, 0b111, "pmhaccu.h">;
700+
def PMHRACCU_H : RVPBinary_rr<0b0011, 0b10, 0b111, "pmhraccu.h">;
701+
702+
def PMULH_H_B0 : RVPBinary_rr<0b0100, 0b00, 0b111, "pmulh.h.b0">;
703+
def PMULHSU_H_B0 : RVPBinary_rr<0b0100, 0b10, 0b111, "pmulhsu.h.b0">;
704+
def PMHACCU_H_B0 : RVPBinary_rr<0b0101, 0b00, 0b111, "pmhaccu.h.b0">;
705+
def PMHACCSU_H_B0 : RVPBinary_rr<0b0101, 0b10, 0b111, "pmhaccsu.h.b0">;
706+
def PMULH_H_B1 : RVPBinary_rr<0b0110, 0b00, 0b111, "pmulh.h.b1">;
707+
def PMULHSU_H_B1 : RVPBinary_rr<0b0110, 0b10, 0b111, "pmulhsu.h.b1">;
708+
def PMHACC_H_B1 : RVPBinary_rr<0b0111, 0b00, 0b111, "pmhacc.h.b1">;
709+
def PMHACCSU_H_B1 : RVPBinary_rr<0b0111, 0b10, 0b111, "pmhaccsu.h.b1">;
710+
711+
def PMULHSU_H : RVPBinary_rr<0b1000, 0b00, 0b111, "pmulhsu.h">;
712+
def PMULHRSU_H : RVPBinary_rr<0b1000, 0b10, 0b111, "pmulhrsu.h">;
713+
def PMHACCSU_H : RVPBinary_rr<0b1001, 0b00, 0b111, "pmhaccsu.h">;
714+
def PMHRACCSU_H : RVPBinary_rr<0b1001, 0b10, 0b111, "pmhraccsu.h">;
715+
def PMULQ_H : RVPBinary_rr<0b1010, 0b00, 0b111, "pmulq.h">;
716+
def PMULQR_H : RVPBinary_rr<0b1010, 0b10, 0b111, "pmulqr.h">;
717+
} // Predicates = [HasStdExtP]
718+
719+
let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
720+
def MULHR : RVPBinary_rr<0b0000, 0b11, 0b111, "mulhr">;
721+
def MHACC : RVPBinary_rr<0b0001, 0b01, 0b111, "mhacc">;
722+
def MHRACC : RVPBinary_rr<0b0001, 0b11, 0b111, "mhracc">;
723+
def MULHRU : RVPBinary_rr<0b0010, 0b11, 0b111, "mulhru">;
724+
def MHACCU : RVPBinary_rr<0b0011, 0b01, 0b111, "mhaccu">;
725+
def MHRACCU : RVPBinary_rr<0b0011, 0b11, 0b111, "mhraccu">;
726+
727+
def MULH_H0 : RVPBinary_rr<0b0100, 0b01, 0b111, "mulh.h0">;
728+
def MULHSU_H0 : RVPBinary_rr<0b0100, 0b11, 0b111, "mulhsu.h0">;
729+
def MHACC_H0 : RVPBinary_rr<0b0101, 0b01, 0b111, "mhacc.h0">;
730+
def MHACCSU_H0 : RVPBinary_rr<0b0101, 0b11, 0b111, "mhaccsu.h0">;
731+
def MULH_H1 : RVPBinary_rr<0b0110, 0b01, 0b111, "mulh.h1">;
732+
def MULHSU_H1 : RVPBinary_rr<0b0110, 0b11, 0b111, "mulhsu.h1">;
733+
def MHACC_H1 : RVPBinary_rr<0b0111, 0b01, 0b111, "mhacc.h1">;
734+
def MHACCSU_H1 : RVPBinary_rr<0b0111, 0b11, 0b111, "mhaccsu.h1">;
735+
736+
def MULHRSU_H : RVPBinary_rr<0b1000, 0b11, 0b111, "mulhrsu.h">;
737+
def MHACCSU : RVPBinary_rr<0b1001, 0b01, 0b111, "mhaccsu">;
738+
def MHRACCSU : RVPBinary_rr<0b1001, 0b11, 0b111, "mhraccsu">;
739+
def MULQ : RVPBinary_rr<0b1010, 0b01, 0b111, "mulq">;
740+
def MULQR : RVPBinary_rr<0b1010, 0b11, 0b111, "mulqr">;
741+
742+
def MQACC_H00 : RVPBinary_rr<0b1101, 0b00, 0b111, "mqacc.h00">;
743+
def MQRACC_H00 : RVPBinary_rr<0b1101, 0b10, 0b111, "mqracc.h00">;
744+
def MQACC_H11 : RVPBinary_rr<0b1111, 0b00, 0b111, "mqacc.h11">;
745+
def MQRACC_H11 : RVPBinary_rr<0b1111, 0b10, 0b111, "mqracc.h11">;
746+
} // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in
747+
let Predicates = [HasStdExtP, IsRV64] in {
748+
def PMULH_W : RVPBinary_rr<0b0000, 0b01, 0b111, "pmulh.w">;
749+
def PMULHR_W : RVPBinary_rr<0b0000, 0b11, 0b111, "pmulhr.w">;
750+
def PMHACC_W : RVPBinary_rr<0b0001, 0b01, 0b111, "pmhacc.w">;
751+
def PMHRACC_W : RVPBinary_rr<0b0001, 0b11, 0b111, "pmhracc.w">;
752+
def PMULHU_W : RVPBinary_rr<0b0010, 0b01, 0b111, "pmulhu.w">;
753+
def PMULHRU_W : RVPBinary_rr<0b0010, 0b11, 0b111, "pmulhru.w">;
754+
def PMHACCU_W : RVPBinary_rr<0b0011, 0b01, 0b111, "pmhaccu.w">;
755+
def PMHRACCU_W : RVPBinary_rr<0b0011, 0b11, 0b111, "pmhraccu.w">;
756+
757+
def PMULH_W_H0 : RVPBinary_rr<0b0100, 0b01, 0b111, "pmulh.w.h0">;
758+
def PMULHSU_W_H0 : RVPBinary_rr<0b0100, 0b11, 0b111, "pmulhsu.w.h0">;
759+
def PMHACC_W_H0 : RVPBinary_rr<0b0101, 0b01, 0b111, "pmhacc.w.h0">;
760+
def PMHACCSU_W_H0 : RVPBinary_rr<0b0101, 0b11, 0b111, "pmhaccsu.w.h0">;
761+
def PMULH_W_H1 : RVPBinary_rr<0b0110, 0b01, 0b111, "pmulh.w.h1">;
762+
def PMULHSU_W_H1 : RVPBinary_rr<0b0110, 0b11, 0b111, "pmulhsu.w.h1">;
763+
def PMHACC_W_H1 : RVPBinary_rr<0b0111, 0b01, 0b111, "pmhacc.w.h1">;
764+
def PMHACCSU_W_H1 : RVPBinary_rr<0b0111, 0b11, 0b111, "pmhaccsu.w.h1">;
765+
766+
def PMULHSU_W : RVPBinary_rr<0b1000, 0b01, 0b111, "pmulhsu.w">;
767+
def PMULHRSU_W : RVPBinary_rr<0b1000, 0b11, 0b111, "pmulhrsu.w">;
768+
def PMHACCSU_W : RVPBinary_rr<0b1001, 0b01, 0b111, "pmhaccsu.w">;
769+
def PMHRACCSU_W : RVPBinary_rr<0b1001, 0b11, 0b111, "pmhraccsu.w">;
770+
def PMULQ_W : RVPBinary_rr<0b1010, 0b01, 0b111, "pmulq.w">;
771+
def PMULQR_W : RVPBinary_rr<0b1010, 0b11, 0b111, "pmulqr.w">;
772+
773+
def PMQACC_W_H00 : RVPBinary_rr<0b1101, 0b00, 0b111, "pmqacc.w.h00">;
774+
def MQACC_W00 : RVPBinary_rr<0b1101, 0b01, 0b111, "mqacc.w00">;
775+
def PMQRACC_W_H00 : RVPBinary_rr<0b1101, 0b10, 0b111, "pmqracc.w.h00">;
776+
def MQRACC_W00 : RVPBinary_rr<0b1101, 0b11, 0b111, "mqracc.w00">;
777+
def PMQACC_W_H11 : RVPBinary_rr<0b1111, 0b00, 0b111, "pmqacc.w.h11">;
778+
def MQACC_W11 : RVPBinary_rr<0b1111, 0b01, 0b111, "mqacc.w11">;
779+
def PMQRACC_W_H11 : RVPBinary_rr<0b1111, 0b10, 0b111, "pmqracc.w.h11">;
780+
def MQRACC_W11 : RVPBinary_rr<0b1111, 0b11, 0b111, "mqracc.w11">;
781+
} // Predicates = [HasStdExtP, IsRV64]

llvm/test/MC/RISCV/attribute-arch.s

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -492,8 +492,8 @@
492492
.attribute arch, "rv32i_sdtrig1p0"
493493
# CHECK: attribute 5, "rv32i2p1_sdtrig1p0"
494494

495-
.attribute arch, "rv32i_p0p14"
496-
# CHECK: attribute 5, "rv32i2p1_p0p14"
495+
.attribute arch, "rv32i_p0p15"
496+
# CHECK: attribute 5, "rv32i2p1_p0p15"
497497

498-
.attribute arch, "rv64i_p0p14"
499-
# CHECK: attribute 5, "rv64i2p1_p0p14"
498+
.attribute arch, "rv64i_p0p15"
499+
# CHECK: attribute 5, "rv64i2p1_p0p15"

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