Restore range check for strict-fp opcodes

Author: s-barannikov

llvm/lib/Target/AArch64/AArch64ISelLowering.h

@@ -477,8 +477,10 @@ enum NodeType : unsigned {
   MSRR,
 
   // Strict (exception-raising) floating point comparison
-  STRICT_FCMP,
+  FIRST_STRICTFP_OPCODE,
+  STRICT_FCMP = FIRST_STRICTFP_OPCODE,
   STRICT_FCMPE,
+  LAST_STRICTFP_OPCODE = STRICT_FCMPE,
 
   // NEON Load/Store with post-increment base updates
   FIRST_MEMORY_OPCODE,

llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp

@@ -29,13 +29,8 @@ bool AArch64SelectionDAGInfo::isTargetMemoryOpcode(unsigned Opcode) const {
 }
 
 bool AArch64SelectionDAGInfo::isTargetStrictFPOpcode(unsigned Opcode) const {
-  switch (static_cast<AArch64ISD::NodeType>(Opcode)) {
-  default:
-    return false;
-  case AArch64ISD::STRICT_FCMP:
-  case AArch64ISD::STRICT_FCMPE:
-    return true;
-  }
+  return Opcode >= AArch64ISD::FIRST_STRICTFP_OPCODE &&
+         Opcode <= AArch64ISD::LAST_STRICTFP_OPCODE;
 }
 
 SDValue AArch64SelectionDAGInfo::EmitMOPS(unsigned Opcode, SelectionDAG &DAG,

llvm/lib/Target/PowerPC/PPCISelLowering.h

@@ -484,7 +484,8 @@ namespace llvm {
     XXMFACC,
 
     // Constrained conversion from floating point to int
-    STRICT_FCTIDZ,
+    FIRST_STRICTFP_OPCODE,
+    STRICT_FCTIDZ = FIRST_STRICTFP_OPCODE,
     STRICT_FCTIWZ,
     STRICT_FCTIDUZ,
     STRICT_FCTIWUZ,
@@ -497,6 +498,7 @@ namespace llvm {
 
     /// Constrained floating point add in round-to-zero mode.
     STRICT_FADDRTZ,
+    LAST_STRICTFP_OPCODE = STRICT_FADDRTZ,
 
     /// SETBC - The ISA 3.1 (P10) SETBC instruction.
     SETBC,

llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp

@@ -19,18 +19,6 @@ bool PPCSelectionDAGInfo::isTargetMemoryOpcode(unsigned Opcode) const {
 }
 
 bool PPCSelectionDAGInfo::isTargetStrictFPOpcode(unsigned Opcode) const {
-  switch (static_cast<PPCISD::NodeType>(Opcode)) {
-  default:
-    return false;
-  case PPCISD::STRICT_FCTIDZ:
-  case PPCISD::STRICT_FCTIWZ:
-  case PPCISD::STRICT_FCTIDUZ:
-  case PPCISD::STRICT_FCTIWUZ:
-  case PPCISD::STRICT_FCFID:
-  case PPCISD::STRICT_FCFIDU:
-  case PPCISD::STRICT_FCFIDS:
-  case PPCISD::STRICT_FCFIDUS:
-  case PPCISD::STRICT_FADDRTZ:
-    return true;
-  }
+  return Opcode >= PPCISD::FIRST_STRICTFP_OPCODE &&
+         Opcode <= PPCISD::LAST_STRICTFP_OPCODE;
 }

llvm/lib/Target/SystemZ/SystemZISelLowering.h

@@ -307,7 +307,8 @@ enum NodeType : unsigned {
 
   // Strict variants of scalar floating-point comparisons.
   // Quiet and signaling versions.
-  STRICT_FCMP,
+  FIRST_STRICTFP_OPCODE,
+  STRICT_FCMP = FIRST_STRICTFP_OPCODE,
   STRICT_FCMPS,
 
   // Strict variants of vector floating-point comparisons.
@@ -322,6 +323,7 @@ enum NodeType : unsigned {
   // Strict variants of VEXTEND and VROUND.
   STRICT_VEXTEND,
   STRICT_VROUND,
+  LAST_STRICTFP_OPCODE = STRICT_VROUND,
 
   // Wrappers around the inner loop of an 8- or 16-bit ATOMIC_SWAP or
   // ATOMIC_LOAD_<op>.

llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp

@@ -23,21 +23,8 @@ bool SystemZSelectionDAGInfo::isTargetMemoryOpcode(unsigned Opcode) const {
 }
 
 bool SystemZSelectionDAGInfo::isTargetStrictFPOpcode(unsigned Opcode) const {
-  switch (static_cast<SystemZISD::NodeType>(Opcode)) {
-  default:
-    return false;
-  case SystemZISD::STRICT_FCMP:
-  case SystemZISD::STRICT_FCMPS:
-  case SystemZISD::STRICT_VFCMPE:
-  case SystemZISD::STRICT_VFCMPH:
-  case SystemZISD::STRICT_VFCMPHE:
-  case SystemZISD::STRICT_VFCMPES:
-  case SystemZISD::STRICT_VFCMPHS:
-  case SystemZISD::STRICT_VFCMPHES:
-  case SystemZISD::STRICT_VEXTEND:
-  case SystemZISD::STRICT_VROUND:
-    return true;
-  }
+  return Opcode >= SystemZISD::FIRST_STRICTFP_OPCODE &&
+         Opcode <= SystemZISD::LAST_STRICTFP_OPCODE;
 }
 
 static unsigned getMemMemLenAdj(unsigned Op) {