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RKSimonRKSimon
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update missed tests
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2 files changed

+70
-74
lines changed

2 files changed

+70
-74
lines changed

‎llvm/test/CodeGen/NVPTX/i128.ll‎

Lines changed: 47 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -13,14 +13,14 @@ define i128 @srem_i128(i128 %lhs, i128 %rhs) {
1313
; CHECK-NEXT: ld.param.v2.b64 {%rd8, %rd9}, [srem_i128_param_0];
1414
; CHECK-NEXT: ld.param.v2.b64 {%rd10, %rd11}, [srem_i128_param_1];
1515
; CHECK-NEXT: shr.s64 %rd1, %rd9, 63;
16+
; CHECK-NEXT: setp.lt.s64 %p1, %rd9, 0;
1617
; CHECK-NEXT: sub.cc.s64 %rd12, 0, %rd8;
1718
; CHECK-NEXT: subc.cc.s64 %rd13, 0, %rd9;
18-
; CHECK-NEXT: setp.lt.s64 %p1, %rd9, 0;
1919
; CHECK-NEXT: selp.b64 %rd3, %rd13, %rd9, %p1;
2020
; CHECK-NEXT: selp.b64 %rd2, %rd12, %rd8, %p1;
21+
; CHECK-NEXT: setp.lt.s64 %p2, %rd11, 0;
2122
; CHECK-NEXT: sub.cc.s64 %rd14, 0, %rd10;
2223
; CHECK-NEXT: subc.cc.s64 %rd15, 0, %rd11;
23-
; CHECK-NEXT: setp.lt.s64 %p2, %rd11, 0;
2424
; CHECK-NEXT: selp.b64 %rd5, %rd15, %rd11, %p2;
2525
; CHECK-NEXT: selp.b64 %rd4, %rd14, %rd10, %p2;
2626
; CHECK-NEXT: or.b64 %rd16, %rd4, %rd5;
@@ -151,24 +151,24 @@ define i128 @urem_i128(i128 %lhs, i128 %rhs) {
151151
; CHECK-NEXT: .reg .b64 %rd<66>;
152152
; CHECK-EMPTY:
153153
; CHECK-NEXT: // %bb.0: // %_udiv-special-cases
154-
; CHECK-NEXT: ld.param.v2.b64 {%rd5, %rd6}, [urem_i128_param_0];
155-
; CHECK-NEXT: ld.param.v2.b64 {%rd1, %rd2}, [urem_i128_param_1];
156-
; CHECK-NEXT: or.b64 %rd7, %rd1, %rd2;
154+
; CHECK-NEXT: ld.param.v2.b64 {%rd1, %rd2}, [urem_i128_param_0];
155+
; CHECK-NEXT: ld.param.v2.b64 {%rd3, %rd4}, [urem_i128_param_1];
156+
; CHECK-NEXT: or.b64 %rd7, %rd3, %rd4;
157157
; CHECK-NEXT: setp.eq.b64 %p1, %rd7, 0;
158-
; CHECK-NEXT: or.b64 %rd8, %rd5, %rd6;
158+
; CHECK-NEXT: or.b64 %rd8, %rd1, %rd2;
159159
; CHECK-NEXT: setp.eq.b64 %p2, %rd8, 0;
160160
; CHECK-NEXT: or.pred %p3, %p1, %p2;
161-
; CHECK-NEXT: setp.ne.b64 %p4, %rd2, 0;
162-
; CHECK-NEXT: clz.b64 %r1, %rd2;
161+
; CHECK-NEXT: setp.ne.b64 %p4, %rd4, 0;
162+
; CHECK-NEXT: clz.b64 %r1, %rd4;
163163
; CHECK-NEXT: cvt.u64.u32 %rd9, %r1;
164-
; CHECK-NEXT: clz.b64 %r2, %rd1;
164+
; CHECK-NEXT: clz.b64 %r2, %rd3;
165165
; CHECK-NEXT: cvt.u64.u32 %rd10, %r2;
166166
; CHECK-NEXT: add.s64 %rd11, %rd10, 64;
167167
; CHECK-NEXT: selp.b64 %rd12, %rd9, %rd11, %p4;
168-
; CHECK-NEXT: setp.ne.b64 %p5, %rd6, 0;
169-
; CHECK-NEXT: clz.b64 %r3, %rd6;
168+
; CHECK-NEXT: setp.ne.b64 %p5, %rd2, 0;
169+
; CHECK-NEXT: clz.b64 %r3, %rd2;
170170
; CHECK-NEXT: cvt.u64.u32 %rd13, %r3;
171-
; CHECK-NEXT: clz.b64 %r4, %rd5;
171+
; CHECK-NEXT: clz.b64 %r4, %rd1;
172172
; CHECK-NEXT: cvt.u64.u32 %rd14, %r4;
173173
; CHECK-NEXT: add.s64 %rd15, %rd14, 64;
174174
; CHECK-NEXT: selp.b64 %rd16, %rd13, %rd15, %p5;
@@ -184,8 +184,8 @@ define i128 @urem_i128(i128 %lhs, i128 %rhs) {
184184
; CHECK-NEXT: xor.b64 %rd19, %rd17, 127;
185185
; CHECK-NEXT: or.b64 %rd20, %rd19, %rd18;
186186
; CHECK-NEXT: setp.eq.b64 %p12, %rd20, 0;
187-
; CHECK-NEXT: selp.b64 %rd65, 0, %rd6, %p11;
188-
; CHECK-NEXT: selp.b64 %rd64, 0, %rd5, %p11;
187+
; CHECK-NEXT: selp.b64 %rd65, 0, %rd2, %p11;
188+
; CHECK-NEXT: selp.b64 %rd64, 0, %rd1, %p11;
189189
; CHECK-NEXT: or.pred %p13, %p11, %p12;
190190
; CHECK-NEXT: @%p13 bra $L__BB1_5;
191191
; CHECK-NEXT: // %bb.3: // %udiv-bb1
@@ -195,30 +195,30 @@ define i128 @urem_i128(i128 %lhs, i128 %rhs) {
195195
; CHECK-NEXT: setp.eq.b64 %p14, %rd21, 0;
196196
; CHECK-NEXT: cvt.u32.u64 %r5, %rd17;
197197
; CHECK-NEXT: sub.s32 %r6, 127, %r5;
198-
; CHECK-NEXT: shl.b64 %rd22, %rd6, %r6;
198+
; CHECK-NEXT: shl.b64 %rd22, %rd2, %r6;
199199
; CHECK-NEXT: sub.s32 %r7, 64, %r6;
200-
; CHECK-NEXT: shr.u64 %rd23, %rd5, %r7;
200+
; CHECK-NEXT: shr.u64 %rd23, %rd1, %r7;
201201
; CHECK-NEXT: or.b64 %rd24, %rd22, %rd23;
202202
; CHECK-NEXT: sub.s32 %r8, 63, %r5;
203-
; CHECK-NEXT: shl.b64 %rd25, %rd5, %r8;
203+
; CHECK-NEXT: shl.b64 %rd25, %rd1, %r8;
204204
; CHECK-NEXT: setp.gt.s32 %p15, %r6, 63;
205205
; CHECK-NEXT: selp.b64 %rd63, %rd25, %rd24, %p15;
206-
; CHECK-NEXT: shl.b64 %rd62, %rd5, %r6;
206+
; CHECK-NEXT: shl.b64 %rd62, %rd1, %r6;
207207
; CHECK-NEXT: mov.b64 %rd56, %rd57;
208208
; CHECK-NEXT: @%p14 bra $L__BB1_4;
209209
; CHECK-NEXT: // %bb.1: // %udiv-preheader
210210
; CHECK-NEXT: cvt.u32.u64 %r9, %rd58;
211-
; CHECK-NEXT: shr.u64 %rd26, %rd5, %r9;
211+
; CHECK-NEXT: shr.u64 %rd26, %rd1, %r9;
212212
; CHECK-NEXT: sub.s32 %r10, 64, %r9;
213-
; CHECK-NEXT: shl.b64 %rd27, %rd6, %r10;
213+
; CHECK-NEXT: shl.b64 %rd27, %rd2, %r10;
214214
; CHECK-NEXT: or.b64 %rd28, %rd26, %rd27;
215215
; CHECK-NEXT: add.s32 %r11, %r9, -64;
216-
; CHECK-NEXT: shr.u64 %rd29, %rd6, %r11;
216+
; CHECK-NEXT: shr.u64 %rd29, %rd2, %r11;
217217
; CHECK-NEXT: setp.gt.s32 %p16, %r9, 63;
218218
; CHECK-NEXT: selp.b64 %rd60, %rd29, %rd28, %p16;
219-
; CHECK-NEXT: shr.u64 %rd61, %rd6, %r9;
220-
; CHECK-NEXT: add.cc.s64 %rd3, %rd1, -1;
221-
; CHECK-NEXT: addc.cc.s64 %rd4, %rd2, -1;
219+
; CHECK-NEXT: shr.u64 %rd61, %rd2, %r9;
220+
; CHECK-NEXT: add.cc.s64 %rd5, %rd3, -1;
221+
; CHECK-NEXT: addc.cc.s64 %rd6, %rd4, -1;
222222
; CHECK-NEXT: mov.b64 %rd56, 0;
223223
; CHECK-NEXT: mov.b64 %rd57, %rd56;
224224
; CHECK-NEXT: $L__BB1_2: // %udiv-do-while
@@ -235,12 +235,12 @@ define i128 @urem_i128(i128 %lhs, i128 %rhs) {
235235
; CHECK-NEXT: shl.b64 %rd39, %rd62, 1;
236236
; CHECK-NEXT: or.b64 %rd62, %rd57, %rd39;
237237
; CHECK-NEXT: or.b64 %rd63, %rd56, %rd38;
238-
; CHECK-NEXT: sub.cc.s64 %rd40, %rd3, %rd35;
239-
; CHECK-NEXT: subc.cc.s64 %rd41, %rd4, %rd32;
238+
; CHECK-NEXT: sub.cc.s64 %rd40, %rd5, %rd35;
239+
; CHECK-NEXT: subc.cc.s64 %rd41, %rd6, %rd32;
240240
; CHECK-NEXT: shr.s64 %rd42, %rd41, 63;
241241
; CHECK-NEXT: and.b64 %rd57, %rd42, 1;
242-
; CHECK-NEXT: and.b64 %rd43, %rd42, %rd1;
243-
; CHECK-NEXT: and.b64 %rd44, %rd42, %rd2;
242+
; CHECK-NEXT: and.b64 %rd43, %rd42, %rd3;
243+
; CHECK-NEXT: and.b64 %rd44, %rd42, %rd4;
244244
; CHECK-NEXT: sub.cc.s64 %rd60, %rd35, %rd43;
245245
; CHECK-NEXT: subc.cc.s64 %rd61, %rd32, %rd44;
246246
; CHECK-NEXT: add.cc.s64 %rd58, %rd58, -1;
@@ -257,12 +257,12 @@ define i128 @urem_i128(i128 %lhs, i128 %rhs) {
257257
; CHECK-NEXT: or.b64 %rd64, %rd57, %rd49;
258258
; CHECK-NEXT: or.b64 %rd65, %rd56, %rd48;
259259
; CHECK-NEXT: $L__BB1_5: // %udiv-end
260-
; CHECK-NEXT: mul.hi.u64 %rd50, %rd1, %rd64;
261-
; CHECK-NEXT: mad.lo.s64 %rd51, %rd1, %rd65, %rd50;
262-
; CHECK-NEXT: mad.lo.s64 %rd52, %rd2, %rd64, %rd51;
263-
; CHECK-NEXT: mul.lo.s64 %rd53, %rd1, %rd64;
264-
; CHECK-NEXT: sub.cc.s64 %rd54, %rd5, %rd53;
265-
; CHECK-NEXT: subc.cc.s64 %rd55, %rd6, %rd52;
260+
; CHECK-NEXT: mul.hi.u64 %rd50, %rd3, %rd64;
261+
; CHECK-NEXT: mad.lo.s64 %rd51, %rd3, %rd65, %rd50;
262+
; CHECK-NEXT: mad.lo.s64 %rd52, %rd4, %rd64, %rd51;
263+
; CHECK-NEXT: mul.lo.s64 %rd53, %rd3, %rd64;
264+
; CHECK-NEXT: sub.cc.s64 %rd54, %rd1, %rd53;
265+
; CHECK-NEXT: subc.cc.s64 %rd55, %rd2, %rd52;
266266
; CHECK-NEXT: st.param.v2.b64 [func_retval0], {%rd54, %rd55};
267267
; CHECK-NEXT: ret;
268268
%div = urem i128 %lhs, %rhs
@@ -313,14 +313,14 @@ define i128 @sdiv_i128(i128 %lhs, i128 %rhs) {
313313
; CHECK-NEXT: // %bb.0: // %_udiv-special-cases
314314
; CHECK-NEXT: ld.param.v2.b64 {%rd8, %rd9}, [sdiv_i128_param_0];
315315
; CHECK-NEXT: ld.param.v2.b64 {%rd10, %rd11}, [sdiv_i128_param_1];
316+
; CHECK-NEXT: setp.lt.s64 %p1, %rd9, 0;
316317
; CHECK-NEXT: sub.cc.s64 %rd12, 0, %rd8;
317318
; CHECK-NEXT: subc.cc.s64 %rd13, 0, %rd9;
318-
; CHECK-NEXT: setp.lt.s64 %p1, %rd9, 0;
319319
; CHECK-NEXT: selp.b64 %rd2, %rd13, %rd9, %p1;
320320
; CHECK-NEXT: selp.b64 %rd1, %rd12, %rd8, %p1;
321+
; CHECK-NEXT: setp.lt.s64 %p2, %rd11, 0;
321322
; CHECK-NEXT: sub.cc.s64 %rd14, 0, %rd10;
322323
; CHECK-NEXT: subc.cc.s64 %rd15, 0, %rd11;
323-
; CHECK-NEXT: setp.lt.s64 %p2, %rd11, 0;
324324
; CHECK-NEXT: selp.b64 %rd4, %rd15, %rd11, %p2;
325325
; CHECK-NEXT: selp.b64 %rd3, %rd14, %rd10, %p2;
326326
; CHECK-NEXT: xor.b64 %rd16, %rd11, %rd9;
@@ -448,16 +448,16 @@ define i128 @udiv_i128(i128 %lhs, i128 %rhs) {
448448
; CHECK-EMPTY:
449449
; CHECK-NEXT: // %bb.0: // %_udiv-special-cases
450450
; CHECK-NEXT: ld.param.v2.b64 {%rd3, %rd4}, [udiv_i128_param_0];
451-
; CHECK-NEXT: ld.param.v2.b64 {%rd5, %rd6}, [udiv_i128_param_1];
452-
; CHECK-NEXT: or.b64 %rd7, %rd5, %rd6;
451+
; CHECK-NEXT: ld.param.v2.b64 {%rd1, %rd2}, [udiv_i128_param_1];
452+
; CHECK-NEXT: or.b64 %rd7, %rd1, %rd2;
453453
; CHECK-NEXT: setp.eq.b64 %p1, %rd7, 0;
454454
; CHECK-NEXT: or.b64 %rd8, %rd3, %rd4;
455455
; CHECK-NEXT: setp.eq.b64 %p2, %rd8, 0;
456456
; CHECK-NEXT: or.pred %p3, %p1, %p2;
457-
; CHECK-NEXT: setp.ne.b64 %p4, %rd6, 0;
458-
; CHECK-NEXT: clz.b64 %r1, %rd6;
457+
; CHECK-NEXT: setp.ne.b64 %p4, %rd2, 0;
458+
; CHECK-NEXT: clz.b64 %r1, %rd2;
459459
; CHECK-NEXT: cvt.u64.u32 %rd9, %r1;
460-
; CHECK-NEXT: clz.b64 %r2, %rd5;
460+
; CHECK-NEXT: clz.b64 %r2, %rd1;
461461
; CHECK-NEXT: cvt.u64.u32 %rd10, %r2;
462462
; CHECK-NEXT: add.s64 %rd11, %rd10, 64;
463463
; CHECK-NEXT: selp.b64 %rd12, %rd9, %rd11, %p4;
@@ -513,8 +513,8 @@ define i128 @udiv_i128(i128 %lhs, i128 %rhs) {
513513
; CHECK-NEXT: setp.gt.s32 %p16, %r9, 63;
514514
; CHECK-NEXT: selp.b64 %rd54, %rd29, %rd28, %p16;
515515
; CHECK-NEXT: shr.u64 %rd55, %rd4, %r9;
516-
; CHECK-NEXT: add.cc.s64 %rd1, %rd5, -1;
517-
; CHECK-NEXT: addc.cc.s64 %rd2, %rd6, -1;
516+
; CHECK-NEXT: add.cc.s64 %rd5, %rd1, -1;
517+
; CHECK-NEXT: addc.cc.s64 %rd6, %rd2, -1;
518518
; CHECK-NEXT: mov.b64 %rd50, 0;
519519
; CHECK-NEXT: mov.b64 %rd51, %rd50;
520520
; CHECK-NEXT: $L__BB5_2: // %udiv-do-while
@@ -531,12 +531,12 @@ define i128 @udiv_i128(i128 %lhs, i128 %rhs) {
531531
; CHECK-NEXT: shl.b64 %rd39, %rd56, 1;
532532
; CHECK-NEXT: or.b64 %rd56, %rd51, %rd39;
533533
; CHECK-NEXT: or.b64 %rd57, %rd50, %rd38;
534-
; CHECK-NEXT: sub.cc.s64 %rd40, %rd1, %rd35;
535-
; CHECK-NEXT: subc.cc.s64 %rd41, %rd2, %rd32;
534+
; CHECK-NEXT: sub.cc.s64 %rd40, %rd5, %rd35;
535+
; CHECK-NEXT: subc.cc.s64 %rd41, %rd6, %rd32;
536536
; CHECK-NEXT: shr.s64 %rd42, %rd41, 63;
537537
; CHECK-NEXT: and.b64 %rd51, %rd42, 1;
538-
; CHECK-NEXT: and.b64 %rd43, %rd42, %rd5;
539-
; CHECK-NEXT: and.b64 %rd44, %rd42, %rd6;
538+
; CHECK-NEXT: and.b64 %rd43, %rd42, %rd1;
539+
; CHECK-NEXT: and.b64 %rd44, %rd42, %rd2;
540540
; CHECK-NEXT: sub.cc.s64 %rd54, %rd35, %rd43;
541541
; CHECK-NEXT: subc.cc.s64 %rd55, %rd32, %rd44;
542542
; CHECK-NEXT: add.cc.s64 %rd52, %rd52, -1;

‎llvm/test/CodeGen/SystemZ/pr60413.ll‎

Lines changed: 23 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -15,52 +15,48 @@ define dso_local void @m() local_unnamed_addr #1 {
1515
; CHECK: # %bb.0: # %entry
1616
; CHECK-NEXT: stmg %r13, %r15, 104(%r15)
1717
; CHECK-NEXT: aghi %r15, -168
18-
; CHECK-NEXT: lhrl %r1, f+4
18+
; CHECK-NEXT: llhrl %r1, f+4
1919
; CHECK-NEXT: sll %r1, 8
2020
; CHECK-NEXT: larl %r2, f
2121
; CHECK-NEXT: ic %r1, 6(%r2)
22+
; CHECK-NEXT: vlvgp %v0, %r1, %r1
23+
; CHECK-NEXT: vrepf %v1, %v0, 1
24+
; CHECK-NEXT: vlr %v2, %v1
25+
; CHECK-NEXT: vrepif %v0, 127
26+
; CHECK-NEXT: vchlf %v3, %v1, %v0
27+
; CHECK-NEXT: vlvgf %v1, %r0, 0
28+
; CHECK-NEXT: vlvgf %v1, %r0, 1
29+
; CHECK-NEXT: vlvgf %v1, %r0, 2
30+
; CHECK-NEXT: vgbm %v4, 30583
31+
; CHECK-NEXT: vn %v1, %v1, %v4
32+
; CHECK-NEXT: vlvgf %v2, %r0, 3
33+
; CHECK-NEXT: vn %v2, %v2, %v4
2234
; CHECK-NEXT: larl %r2, e
2335
; CHECK-NEXT: lb %r0, 3(%r2)
24-
; CHECK-NEXT: vlvgp %v0, %r0, %r1
25-
; CHECK-NEXT: vlvgp %v1, %r1, %r0
26-
; CHECK-NEXT: vlvgf %v1, %r1, 0
27-
; CHECK-NEXT: vlvgf %v1, %r1, 2
28-
; CHECK-NEXT: vlvgp %v2, %r1, %r1
29-
; CHECK-NEXT: # kill: def $r1l killed $r1l killed $r1d
30-
; CHECK-NEXT: nilh %r1, 255
3136
; CHECK-NEXT: chi %r1, 128
3237
; CHECK-NEXT: ipm %r1
3338
; CHECK-NEXT: risbg %r1, %r1, 63, 191, 36
34-
; CHECK-NEXT: vlvgf %v0, %r0, 0
35-
; CHECK-NEXT: vlvgf %v0, %r0, 2
36-
; CHECK-NEXT: vgbm %v3, 30583
37-
; CHECK-NEXT: vn %v0, %v0, %v3
38-
; CHECK-NEXT: vn %v1, %v1, %v3
39-
; CHECK-NEXT: vrepf %v2, %v2, 1
40-
; CHECK-NEXT: vn %v2, %v2, %v3
41-
; CHECK-NEXT: vrepif %v3, 127
42-
; CHECK-NEXT: vchlf %v1, %v1, %v3
43-
; CHECK-NEXT: vlgvf %r13, %v1, 0
44-
; CHECK-NEXT: vchlf %v2, %v2, %v3
45-
; CHECK-NEXT: vlgvf %r3, %v2, 1
39+
; CHECK-NEXT: vlgvf %r3, %v3, 1
4640
; CHECK-NEXT: nilf %r3, 1
47-
; CHECK-NEXT: vlgvf %r4, %v2, 0
41+
; CHECK-NEXT: vlgvf %r4, %v3, 0
4842
; CHECK-NEXT: risbg %r2, %r4, 48, 176, 15
4943
; CHECK-NEXT: rosbg %r2, %r3, 32, 49, 14
50-
; CHECK-NEXT: vlgvf %r5, %v2, 2
44+
; CHECK-NEXT: vlgvf %r5, %v3, 2
5145
; CHECK-NEXT: nilf %r5, 1
5246
; CHECK-NEXT: rosbg %r2, %r5, 32, 50, 13
53-
; CHECK-NEXT: vlgvf %r14, %v2, 3
47+
; CHECK-NEXT: vlgvf %r14, %v3, 3
5448
; CHECK-NEXT: nilf %r14, 1
5549
; CHECK-NEXT: rosbg %r2, %r14, 32, 51, 12
50+
; CHECK-NEXT: vchlf %v2, %v2, %v0
51+
; CHECK-NEXT: vlgvf %r13, %v2, 0
5652
; CHECK-NEXT: rosbg %r2, %r13, 52, 52, 11
57-
; CHECK-NEXT: vlgvf %r13, %v1, 1
53+
; CHECK-NEXT: vlgvf %r13, %v2, 1
5854
; CHECK-NEXT: rosbg %r2, %r13, 53, 53, 10
59-
; CHECK-NEXT: vlgvf %r13, %v1, 2
55+
; CHECK-NEXT: vlgvf %r13, %v2, 2
6056
; CHECK-NEXT: rosbg %r2, %r13, 54, 54, 9
61-
; CHECK-NEXT: vlgvf %r13, %v1, 3
57+
; CHECK-NEXT: vlgvf %r13, %v2, 3
6258
; CHECK-NEXT: rosbg %r2, %r13, 55, 55, 8
63-
; CHECK-NEXT: vchlf %v0, %v0, %v3
59+
; CHECK-NEXT: vchlf %v0, %v1, %v0
6460
; CHECK-NEXT: vlgvf %r13, %v0, 0
6561
; CHECK-NEXT: rosbg %r2, %r13, 56, 56, 7
6662
; CHECK-NEXT: vlgvf %r13, %v0, 1

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