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michaelmaitlandmichaelmaitland
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fixup! update tests after rebase
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+21
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‎llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll‎

Lines changed: 21 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -184,9 +184,8 @@ define <vscale x 1 x i1> @icmp_uge_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1
184184
define <vscale x 1 x i1> @icmp_uge_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
185185
; CHECK-LABEL: icmp_uge_vx_nxv1i8:
186186
; CHECK: # %bb.0:
187-
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
188-
; CHECK-NEXT: vmv.v.x v9, a0
189187
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
188+
; CHECK-NEXT: vmv.v.x v9, a0
190189
; CHECK-NEXT: vmsleu.vv v0, v9, v8, v0.t
191190
; CHECK-NEXT: ret
192191
%elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
@@ -348,9 +347,8 @@ define <vscale x 1 x i1> @icmp_sge_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1
348347
define <vscale x 1 x i1> @icmp_sge_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
349348
; CHECK-LABEL: icmp_sge_vx_nxv1i8:
350349
; CHECK: # %bb.0:
351-
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
352-
; CHECK-NEXT: vmv.v.x v9, a0
353350
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
351+
; CHECK-NEXT: vmv.v.x v9, a0
354352
; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t
355353
; CHECK-NEXT: ret
356354
%elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
@@ -470,9 +468,8 @@ define <vscale x 1 x i1> @icmp_sle_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vsca
470468
define <vscale x 1 x i1> @icmp_sle_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
471469
; CHECK-LABEL: icmp_sle_vx_swap_nxv1i8:
472470
; CHECK: # %bb.0:
473-
; CHECK-NEXT: vsetvli a2, zero, e8, mf8, ta, ma
474-
; CHECK-NEXT: vmv.v.x v9, a0
475471
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
472+
; CHECK-NEXT: vmv.v.x v9, a0
476473
; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t
477474
; CHECK-NEXT: ret
478475
%elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
@@ -543,10 +540,9 @@ define <vscale x 8 x i1> @icmp_eq_vv_nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x
543540
; CHECK-LABEL: icmp_eq_vv_nxv8i7:
544541
; CHECK: # %bb.0:
545542
; CHECK-NEXT: li a1, 127
546-
; CHECK-NEXT: vsetvli a2, zero, e8, m1, ta, ma
543+
; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma
547544
; CHECK-NEXT: vand.vx v9, v9, a1
548545
; CHECK-NEXT: vand.vx v8, v8, a1
549-
; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma
550546
; CHECK-NEXT: vmseq.vv v0, v8, v9, v0.t
551547
; CHECK-NEXT: ret
552548
%v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)
@@ -557,11 +553,10 @@ define <vscale x 8 x i1> @icmp_eq_vx_nxv8i7(<vscale x 8 x i7> %va, i7 %b, <vscal
557553
; CHECK-LABEL: icmp_eq_vx_nxv8i7:
558554
; CHECK: # %bb.0:
559555
; CHECK-NEXT: li a2, 127
560-
; CHECK-NEXT: vsetvli a3, zero, e8, m1, ta, ma
556+
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
561557
; CHECK-NEXT: vmv.v.x v9, a0
562558
; CHECK-NEXT: vand.vx v8, v8, a2
563559
; CHECK-NEXT: vand.vx v9, v9, a2
564-
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
565560
; CHECK-NEXT: vmseq.vv v0, v8, v9, v0.t
566561
; CHECK-NEXT: ret
567562
%elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 0
@@ -574,11 +569,10 @@ define <vscale x 8 x i1> @icmp_eq_vx_swap_nxv8i7(<vscale x 8 x i7> %va, i7 %b, <
574569
; CHECK-LABEL: icmp_eq_vx_swap_nxv8i7:
575570
; CHECK: # %bb.0:
576571
; CHECK-NEXT: li a2, 127
577-
; CHECK-NEXT: vsetvli a3, zero, e8, m1, ta, ma
572+
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
578573
; CHECK-NEXT: vmv.v.x v9, a0
579574
; CHECK-NEXT: vand.vx v8, v8, a2
580575
; CHECK-NEXT: vand.vx v9, v9, a2
581-
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
582576
; CHECK-NEXT: vmseq.vv v0, v9, v8, v0.t
583577
; CHECK-NEXT: ret
584578
%elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 0
@@ -764,9 +758,8 @@ define <vscale x 8 x i1> @icmp_uge_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8
764758
define <vscale x 8 x i1> @icmp_uge_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
765759
; CHECK-LABEL: icmp_uge_vx_nxv8i8:
766760
; CHECK: # %bb.0:
767-
; CHECK-NEXT: vsetvli a2, zero, e8, m1, ta, ma
768-
; CHECK-NEXT: vmv.v.x v9, a0
769761
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
762+
; CHECK-NEXT: vmv.v.x v9, a0
770763
; CHECK-NEXT: vmsleu.vv v0, v9, v8, v0.t
771764
; CHECK-NEXT: ret
772765
%elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
@@ -928,9 +921,8 @@ define <vscale x 8 x i1> @icmp_sge_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8
928921
define <vscale x 8 x i1> @icmp_sge_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
929922
; CHECK-LABEL: icmp_sge_vx_nxv8i8:
930923
; CHECK: # %bb.0:
931-
; CHECK-NEXT: vsetvli a2, zero, e8, m1, ta, ma
932-
; CHECK-NEXT: vmv.v.x v9, a0
933924
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
925+
; CHECK-NEXT: vmv.v.x v9, a0
934926
; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t
935927
; CHECK-NEXT: ret
936928
%elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
@@ -1050,9 +1042,8 @@ define <vscale x 8 x i1> @icmp_sle_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vsca
10501042
define <vscale x 8 x i1> @icmp_sle_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
10511043
; CHECK-LABEL: icmp_sle_vx_swap_nxv8i8:
10521044
; CHECK: # %bb.0:
1053-
; CHECK-NEXT: vsetvli a2, zero, e8, m1, ta, ma
1054-
; CHECK-NEXT: vmv.v.x v9, a0
10551045
; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
1046+
; CHECK-NEXT: vmv.v.x v9, a0
10561047
; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t
10571048
; CHECK-NEXT: ret
10581049
%elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
@@ -1377,9 +1368,8 @@ define <vscale x 1 x i1> @icmp_uge_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x
13771368
define <vscale x 1 x i1> @icmp_uge_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
13781369
; CHECK-LABEL: icmp_uge_vx_nxv1i32:
13791370
; CHECK: # %bb.0:
1380-
; CHECK-NEXT: vsetvli a2, zero, e32, mf2, ta, ma
1381-
; CHECK-NEXT: vmv.v.x v9, a0
13821371
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
1372+
; CHECK-NEXT: vmv.v.x v9, a0
13831373
; CHECK-NEXT: vmsleu.vv v0, v9, v8, v0.t
13841374
; CHECK-NEXT: ret
13851375
%elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
@@ -1541,9 +1531,8 @@ define <vscale x 1 x i1> @icmp_sge_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x
15411531
define <vscale x 1 x i1> @icmp_sge_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
15421532
; CHECK-LABEL: icmp_sge_vx_nxv1i32:
15431533
; CHECK: # %bb.0:
1544-
; CHECK-NEXT: vsetvli a2, zero, e32, mf2, ta, ma
1545-
; CHECK-NEXT: vmv.v.x v9, a0
15461534
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
1535+
; CHECK-NEXT: vmv.v.x v9, a0
15471536
; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t
15481537
; CHECK-NEXT: ret
15491538
%elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
@@ -1663,9 +1652,8 @@ define <vscale x 1 x i1> @icmp_sle_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <v
16631652
define <vscale x 1 x i1> @icmp_sle_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
16641653
; CHECK-LABEL: icmp_sle_vx_swap_nxv1i32:
16651654
; CHECK: # %bb.0:
1666-
; CHECK-NEXT: vsetvli a2, zero, e32, mf2, ta, ma
1667-
; CHECK-NEXT: vmv.v.x v9, a0
16681655
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
1656+
; CHECK-NEXT: vmv.v.x v9, a0
16691657
; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t
16701658
; CHECK-NEXT: ret
16711659
%elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
@@ -1887,9 +1875,8 @@ define <vscale x 8 x i1> @icmp_uge_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x
18871875
define <vscale x 8 x i1> @icmp_uge_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
18881876
; CHECK-LABEL: icmp_uge_vx_nxv8i32:
18891877
; CHECK: # %bb.0:
1890-
; CHECK-NEXT: vsetvli a2, zero, e32, m4, ta, ma
1891-
; CHECK-NEXT: vmv.v.x v16, a0
18921878
; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma
1879+
; CHECK-NEXT: vmv.v.x v16, a0
18931880
; CHECK-NEXT: vmsleu.vv v12, v16, v8, v0.t
18941881
; CHECK-NEXT: vmv1r.v v0, v12
18951882
; CHECK-NEXT: ret
@@ -2066,9 +2053,8 @@ define <vscale x 8 x i1> @icmp_sge_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x
20662053
define <vscale x 8 x i1> @icmp_sge_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
20672054
; CHECK-LABEL: icmp_sge_vx_nxv8i32:
20682055
; CHECK: # %bb.0:
2069-
; CHECK-NEXT: vsetvli a2, zero, e32, m4, ta, ma
2070-
; CHECK-NEXT: vmv.v.x v16, a0
20712056
; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma
2057+
; CHECK-NEXT: vmv.v.x v16, a0
20722058
; CHECK-NEXT: vmsle.vv v12, v16, v8, v0.t
20732059
; CHECK-NEXT: vmv1r.v v0, v12
20742060
; CHECK-NEXT: ret
@@ -2199,9 +2185,8 @@ define <vscale x 8 x i1> @icmp_sle_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <v
21992185
define <vscale x 8 x i1> @icmp_sle_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
22002186
; CHECK-LABEL: icmp_sle_vx_swap_nxv8i32:
22012187
; CHECK: # %bb.0:
2202-
; CHECK-NEXT: vsetvli a2, zero, e32, m4, ta, ma
2203-
; CHECK-NEXT: vmv.v.x v16, a0
22042188
; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma
2189+
; CHECK-NEXT: vmv.v.x v16, a0
22052190
; CHECK-NEXT: vmsle.vv v12, v16, v8, v0.t
22062191
; CHECK-NEXT: vmv1r.v v0, v12
22072192
; CHECK-NEXT: ret
@@ -2644,9 +2629,8 @@ define <vscale x 1 x i1> @icmp_uge_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <v
26442629
;
26452630
; RV64-LABEL: icmp_uge_vx_nxv1i64:
26462631
; RV64: # %bb.0:
2647-
; RV64-NEXT: vsetvli a2, zero, e64, m1, ta, ma
2648-
; RV64-NEXT: vmv.v.x v9, a0
26492632
; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma
2633+
; RV64-NEXT: vmv.v.x v9, a0
26502634
; RV64-NEXT: vmsleu.vv v0, v9, v8, v0.t
26512635
; RV64-NEXT: ret
26522636
%elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
@@ -2898,9 +2882,8 @@ define <vscale x 1 x i1> @icmp_sge_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <v
28982882
;
28992883
; RV64-LABEL: icmp_sge_vx_nxv1i64:
29002884
; RV64: # %bb.0:
2901-
; RV64-NEXT: vsetvli a2, zero, e64, m1, ta, ma
2902-
; RV64-NEXT: vmv.v.x v9, a0
29032885
; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma
2886+
; RV64-NEXT: vmv.v.x v9, a0
29042887
; RV64-NEXT: vmsle.vv v0, v9, v8, v0.t
29052888
; RV64-NEXT: ret
29062889
%elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
@@ -3095,9 +3078,8 @@ define <vscale x 1 x i1> @icmp_sle_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %
30953078
;
30963079
; RV64-LABEL: icmp_sle_vx_swap_nxv1i64:
30973080
; RV64: # %bb.0:
3098-
; RV64-NEXT: vsetvli a2, zero, e64, m1, ta, ma
3099-
; RV64-NEXT: vmv.v.x v9, a0
31003081
; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma
3082+
; RV64-NEXT: vmv.v.x v9, a0
31013083
; RV64-NEXT: vmsle.vv v0, v9, v8, v0.t
31023084
; RV64-NEXT: ret
31033085
%elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
@@ -3431,9 +3413,8 @@ define <vscale x 8 x i1> @icmp_uge_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <v
34313413
;
34323414
; RV64-LABEL: icmp_uge_vx_nxv8i64:
34333415
; RV64: # %bb.0:
3434-
; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, ma
3435-
; RV64-NEXT: vmv.v.x v24, a0
34363416
; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma
3417+
; RV64-NEXT: vmv.v.x v24, a0
34373418
; RV64-NEXT: vmsleu.vv v16, v24, v8, v0.t
34383419
; RV64-NEXT: vmv1r.v v0, v16
34393420
; RV64-NEXT: ret
@@ -3706,9 +3687,8 @@ define <vscale x 8 x i1> @icmp_sge_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <v
37063687
;
37073688
; RV64-LABEL: icmp_sge_vx_nxv8i64:
37083689
; RV64: # %bb.0:
3709-
; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, ma
3710-
; RV64-NEXT: vmv.v.x v24, a0
37113690
; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma
3691+
; RV64-NEXT: vmv.v.x v24, a0
37123692
; RV64-NEXT: vmsle.vv v16, v24, v8, v0.t
37133693
; RV64-NEXT: vmv1r.v v0, v16
37143694
; RV64-NEXT: ret
@@ -3919,9 +3899,8 @@ define <vscale x 8 x i1> @icmp_sle_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %
39193899
;
39203900
; RV64-LABEL: icmp_sle_vx_swap_nxv8i64:
39213901
; RV64: # %bb.0:
3922-
; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, ma
3923-
; RV64-NEXT: vmv.v.x v24, a0
39243902
; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma
3903+
; RV64-NEXT: vmv.v.x v24, a0
39253904
; RV64-NEXT: vmsle.vv v16, v24, v8, v0.t
39263905
; RV64-NEXT: vmv1r.v v0, v16
39273906
; RV64-NEXT: ret

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