[AggressiveInstCombine] Check GEP nusw, not inbounds

Author: artagnon

llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp

@@ -530,7 +530,7 @@ static bool tryToRecognizeTableBasedCttz(Instruction &I) {
     return false;
 
   GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(LI->getPointerOperand());
-  if (!GEP || !GEP->isInBounds() || GEP->getNumIndices() != 2)
+  if (!GEP || !GEP->hasNoUnsignedSignedWrap() || GEP->getNumIndices() != 2)
     return false;
 
   if (!GEP->getSourceElementType()->isArrayTy())
@@ -843,7 +843,7 @@ getStrideAndModOffsetOfGEP(Value *PtrOp, const DataLayout &DL) {
 
     for (auto [V, Scale] : VarOffsets) {
       // Only keep a power of two factor for non-inbounds
-      if (!GEP->isInBounds())
+      if (!GEP->hasNoUnsignedSignedWrap())
         Scale = APInt::getOneBitSet(Scale.getBitWidth(), Scale.countr_zero());
 
       if (!Stride)

llvm/test/Transforms/AggressiveInstCombine/lower-table-based-cttz-basics.ll

@@ -116,13 +116,10 @@ entry:
 define i32 @ctz1_nusw(i32 %x) {
 ; CHECK-LABEL: @ctz1_nusw(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[AND:%.*]] = and i32 [[SUB]], [[X]]
-; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[AND]], 125613361
-; CHECK-NEXT:    [[SHR:%.*]] = lshr i32 [[MUL]], 27
-; CHECK-NEXT:    [[IDXPROM:%.*]] = zext i32 [[SHR]] to i64
-; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr nusw [32 x i8], ptr @ctz7.table, i64 0, i64 [[IDXPROM]]
-; CHECK-NEXT:    [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
+; CHECK-NEXT:    [[TMP0:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 [[X]], 0
+; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 0, i32 [[TMP0]]
+; CHECK-NEXT:    [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
 ; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[TMP3]] to i32
 ; CHECK-NEXT:    ret i32 [[CONV]]
 ;

llvm/test/Transforms/AggressiveInstCombine/patterned-load.ll

@@ -141,11 +141,11 @@ define i32 @gep_load_i32_align2_const_offset_wrap(i64 %idx){
 }
 
 define i32 @gep_load_i32_align2_const_offset_nusw(i64 %idx){
-; CHECK-LABEL: @gep_load_i32_align2_const_offset_nusw(
-; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr nusw i16, ptr @constarray2, i64 -2
-; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr nusw [3 x i16], ptr [[TMP1]], i64 [[IDX:%.*]]
-; CHECK-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 2
-; CHECK-NEXT:    ret i32 [[TMP3]]
+; LE-LABEL: @gep_load_i32_align2_const_offset_nusw(
+; LE-NEXT:    ret i32 65537
+;
+; BE-LABEL: @gep_load_i32_align2_const_offset_nusw(
+; BE-NEXT:    ret i32 16777472
 ;
   %1 = getelementptr nusw i16, ptr @constarray2, i64 -2
   %2 = getelementptr nusw [3 x i16], ptr %1, i64 %idx