@@ -5102,27 +5102,23 @@ defm INT_SET_MAXNREG_DEC : SET_MAXNREG<"dec", int_nvvm_setmaxnreg_dec_sync_align
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//
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// WGMMA fence instructions
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//
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- let isConvergent = true in {
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- def INT_NVVM_WGMMA_FENCE_SYNC_ALIGNED : BasicNVPTXInst<(outs), (ins), "wgmma.fence.sync.aligned",
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- [(int_nvvm_wgmma_fence_sync_aligned)]>, Requires<[hasSM90a, hasPTX<80>]>;
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+ let isConvergent = true, Predicates = [hasSM90a, hasPTX<80>] in {
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+ def WGMMA_FENCE_SYNC_ALIGNED : NullaryInst<"wgmma.fence.sync.aligned", int_nvvm_wgmma_fence_sync_aligned>;
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- def INT_NVVM_WGMMA_COMMIT_GROUP_SYNC_ALIGNED : BasicNVPTXInst<(outs), (ins), "wgmma.commit_group.sync.aligned",
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- [(int_nvvm_wgmma_commit_group_sync_aligned)]>, Requires<[hasSM90a, hasPTX<80>]>;
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+ def WGMMA_COMMIT_GROUP_SYNC_ALIGNED : NullaryInst<"wgmma.commit_group.sync.aligned", int_nvvm_wgmma_commit_group_sync_aligned>;
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- def INT_NVVM_WGMMA_WAIT_GROUP_SYNC_ALIGNED : BasicNVPTXInst<(outs), (ins i64imm:$n), "wgmma.wait_group.sync.aligned",
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- [(int_nvvm_wgmma_wait_group_sync_aligned timm:$n)]>, Requires<[hasSM90a, hasPTX<80>]> ;
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+ def WGMMA_WAIT_GROUP_SYNC_ALIGNED : BasicNVPTXInst<(outs), (ins i64imm:$n), "wgmma.wait_group.sync.aligned",
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+ [(int_nvvm_wgmma_wait_group_sync_aligned timm:$n)]>;
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} // isConvergent = true
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let Predicates = [hasSM<90>, hasPTX<78>] in {
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def GRIDDEPCONTROL_LAUNCH_DEPENDENTS :
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- BasicNVPTXInst<(outs), (ins), "griddepcontrol.launch_dependents",
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- [(int_nvvm_griddepcontrol_launch_dependents)]>;
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+ NullaryInst<"griddepcontrol.launch_dependents", int_nvvm_griddepcontrol_launch_dependents>;
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def GRIDDEPCONTROL_WAIT :
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- BasicNVPTXInst<(outs), (ins), "griddepcontrol.wait",
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- [(int_nvvm_griddepcontrol_wait)]>;
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+ NullaryInst<"griddepcontrol.wait", int_nvvm_griddepcontrol_wait>;
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}
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- def INT_EXIT : BasicNVPTXInst<(outs), (ins), "exit", [( int_nvvm_exit)] >;
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+ def EXIT : NullaryInst< "exit", int_nvvm_exit>;
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// Tcgen05 intrinsics
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let isConvergent = true, Predicates = [hasTcgen05Instructions] in {
@@ -5150,9 +5146,7 @@ defm TCGEN05_DEALLOC_CG1: TCGEN05_DEALLOC_INTR<"1", int_nvvm_tcgen05_dealloc_cg1
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defm TCGEN05_DEALLOC_CG2: TCGEN05_DEALLOC_INTR<"2", int_nvvm_tcgen05_dealloc_cg2>;
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multiclass TCGEN05_RELINQ_PERMIT_INTR<string num, Intrinsic Intr> {
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- def "" : BasicNVPTXInst<(outs), (ins),
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- "tcgen05.relinquish_alloc_permit.cta_group::" # num # ".sync.aligned",
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- [(Intr)]>;
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+ def "" : NullaryInst<"tcgen05.relinquish_alloc_permit.cta_group::" # num # ".sync.aligned", Intr>;
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}
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defm TCGEN05_RELINQ_CG1: TCGEN05_RELINQ_PERMIT_INTR<"1", int_nvvm_tcgen05_relinq_alloc_permit_cg1>;
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defm TCGEN05_RELINQ_CG2: TCGEN05_RELINQ_PERMIT_INTR<"2", int_nvvm_tcgen05_relinq_alloc_permit_cg2>;
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