[AArch64][GlobalISel] Removed fallback for urshl/srshl intrinsics with <1 x i64> operands

GISel now places urshl/srshl operands on floating point registers. Generated code is slightly less efficient compare to SDAG.

Author: JoshdRod

llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp

@@ -483,6 +483,8 @@ static bool isFPIntrinsic(const MachineRegisterInfo &MRI,
   case Intrinsic::aarch64_neon_sqadd:
   case Intrinsic::aarch64_neon_sqsub:
   case Intrinsic::aarch64_crypto_sha1h:
+  case Intrinsic::aarch64_neon_srshl:
+  case Intrinsic::aarch64_neon_urshl:
   case Intrinsic::aarch64_neon_sqshl:
   case Intrinsic::aarch64_neon_uqshl:
   case Intrinsic::aarch64_neon_sqrshl: