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1 parent 89608d3 commit 811a20aCopy full SHA for 811a20a
llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
@@ -472,12 +472,10 @@ void AMDGPURewriteAGPRCopyMFMAImpl::eliminateSpillsOfReassignedVGPRs() const {
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SmallVector<LiveInterval *, 32> StackIntervals;
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StackIntervals.reserve(NumSlots);
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- for (auto I = LSS.begin(), E = LSS.end(); I != E; ++I) {
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- int Slot = I->first;
+ for (auto &[Slot, LI] : LSS) {
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if (!MFI.isSpillSlotObjectIndex(Slot) || MFI.isDeadObjectIndex(Slot))
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continue;
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- LiveInterval &LI = I->second;
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const TargetRegisterClass *RC = LSS.getIntervalRegClass(Slot);
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if (TRI.hasVGPRs(RC))
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StackIntervals.push_back(&LI);
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