change the ppc-vsx-fma-mutate pass work with -schedule-ppc-vsx-fma-mutation-early wqpass order

Author: diggerlin

llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

@@ -561,7 +561,7 @@ void PPCPassConfig::addMachineSSAOptimization() {
 
 void PPCPassConfig::addPreRegAlloc() {
   if (getOptLevel() != CodeGenOptLevel::None) {
-    insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID,
+    insertPass(VSXFMAMutateEarly ? &TwoAddressInstructionPassID : &MachineSchedulerID,
                &PPCVSXFMAMutateID);
   }
 

llvm/test/CodeGen/PowerPC/vsx-fma-m-early.ll

@@ -43,14 +43,14 @@ declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>)
 ; CHECK-M-NEXT:         bltlr   cr0
 ; CHECK-M-NEXT: # %bb.1:                                # %for.body.preheader
 ; CHECK-M-NEXT:         xxspltiw vs0, 1069066811
+; CHECK-M-NEXT:         xxspltiw vs1, 1170469888
 ; CHECK-M-NEXT:         mtctr r5
 ; CHECK-M-NEXT:         li r5, 0
 ; CHECK-M-NEXT:         .align  5
 ; CHECK-M-NEXT: L..BB0_2:                               # %for.body
 ; CHECK-M-NEXT:                                         # =>This Inner Loop Header: Depth=1
-; CHECK-M-NEXT:         lxvx vs1, r4, r5
-; CHECK-M-NEXT:         xxspltiw vs2, 1170469888
-; CHECK-M-NEXT:         xvmaddasp vs2, vs1, vs0
+; CHECK-M-NEXT:         lxvx vs2, r4, r5
+; CHECK-M-NEXT:         xvmaddmsp vs2, vs0, vs1
 ; CHECK-M-NEXT:         stxvx vs2, r3, r5
 ; CHECK-M-NEXT:         addi r5, r5, 16
 ; CHECK-M-NEXT:         bdnz L..BB0_2