fixup! clang-format

topperc · topperc · commit 813cb81e6e91 · 2024-11-13T20:18:36.000-08:00
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -1438,8 +1438,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
       }
 
       // Custom-legalize bitcasts from fixed-length vectors to scalar types.
-      setOperationAction(ISD::BITCAST, {MVT::i8, MVT::i16, MVT::i32},
-                         Custom);
+      setOperationAction(ISD::BITCAST, {MVT::i8, MVT::i16, MVT::i32}, Custom);
       if (Subtarget.is64Bit())
         setOperationAction(ISD::BITCAST, MVT::i64, Custom);
       if (Subtarget.hasStdExtZfhminOrZhinxmin())

Original file line number	Diff line number	Diff line change
`@@ -1438,8 +1438,7 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,`
`1438`	`1438`	`}`
`1439`	`1439`
`1440`	`1440`	`// Custom-legalize bitcasts from fixed-length vectors to scalar types.`
`1441`		`- setOperationAction(ISD::BITCAST, {MVT::i8, MVT::i16, MVT::i32},`
`1442`		`- Custom);`
	`1441`	`+ setOperationAction(ISD::BITCAST, {MVT::i8, MVT::i16, MVT::i32}, Custom);`
`1443`	`1442`	`if (Subtarget.is64Bit())`
`1444`	`1443`	`setOperationAction(ISD::BITCAST, MVT::i64, Custom);`
`1445`	`1444`	`if (Subtarget.hasStdExtZfhminOrZhinxmin())`