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Revert "CodeGen: Record MMOs in finalizeBundle" (#166520)
Reverts #166210 Buildbot failures in the libc on GPU bot: https://lab.llvm.org/buildbot/#/builders/10/builds/16711
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‎llvm/lib/CodeGen/MIRParser/MIParser.cpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1161,8 +1161,6 @@ bool MIParser::parse(MachineInstr *&MI) {
11611161
MemOperands.push_back(MemOp);
11621162
if (Token.isNewlineOrEOF())
11631163
break;
1164-
if (OpCode == TargetOpcode::BUNDLE && Token.is(MIToken::lbrace))
1165-
break;
11661164
if (Token.isNot(MIToken::comma))
11671165
return error("expected ',' before the next machine memory operand");
11681166
lex();

‎llvm/lib/CodeGen/MachineInstrBundle.cpp‎

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -137,7 +137,6 @@ void llvm::finalizeBundle(MachineBasicBlock &MBB,
137137
SmallSet<Register, 8> KilledUseSet;
138138
SmallSet<Register, 8> UndefUseSet;
139139
SmallVector<std::pair<Register, Register>> TiedOperands;
140-
SmallVector<MachineInstr *> MemMIs;
141140
for (auto MII = FirstMI; MII != LastMI; ++MII) {
142141
// Debug instructions have no effects to track.
143142
if (MII->isDebugInstr())
@@ -201,9 +200,6 @@ void llvm::finalizeBundle(MachineBasicBlock &MBB,
201200
MIB.setMIFlag(MachineInstr::FrameSetup);
202201
if (MII->getFlag(MachineInstr::FrameDestroy))
203202
MIB.setMIFlag(MachineInstr::FrameDestroy);
204-
205-
if (MII->mayLoadOrStore())
206-
MemMIs.push_back(&*MII);
207203
}
208204

209205
for (Register Reg : LocalDefs) {
@@ -229,8 +225,6 @@ void llvm::finalizeBundle(MachineBasicBlock &MBB,
229225
assert(UseIdx < ExternUses.size());
230226
MIB->tieOperands(DefIdx, LocalDefs.size() + UseIdx);
231227
}
232-
233-
MIB->cloneMergedMemRefs(MF, MemMIs);
234228
}
235229

236230
/// finalizeBundle - Same functionality as the previous finalizeBundle except

‎llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ define amdgpu_kernel void @v_insert_v64i32_varidx(ptr addrspace(1) %out.ptr, ptr
3333
; GCN-NEXT: v_mov_b32_e32 v13, s49
3434
; GCN-NEXT: v_mov_b32_e32 v14, s50
3535
; GCN-NEXT: v_mov_b32_e32 v15, s51
36+
; GCN-NEXT: s_load_dwordx16 s[36:51], s[22:23], 0xc0
3637
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
3738
; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0 offset:4
3839
; GCN-NEXT: buffer_store_dword v2, off, s[0:3], 0 offset:8
@@ -50,7 +51,6 @@ define amdgpu_kernel void @v_insert_v64i32_varidx(ptr addrspace(1) %out.ptr, ptr
5051
; GCN-NEXT: buffer_store_dword v14, off, s[0:3], 0 offset:56
5152
; GCN-NEXT: buffer_store_dword v15, off, s[0:3], 0 offset:60
5253
; GCN-NEXT: v_mov_b32_e32 v0, s52
53-
; GCN-NEXT: s_load_dwordx16 s[36:51], s[22:23], 0xc0
5454
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:64
5555
; GCN-NEXT: v_mov_b32_e32 v0, s53
5656
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:68

‎llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -189,11 +189,15 @@ define amdgpu_kernel void @store_lds_v4i32_align1(ptr addrspace(3) %out, <4 x i3
189189
; GFX10-NEXT: v_mov_b32_e32 v2, s1
190190
; GFX10-NEXT: s_lshr_b32 s6, s1, 16
191191
; GFX10-NEXT: v_mov_b32_e32 v4, s4
192+
; GFX10-NEXT: s_lshr_b32 s1, s1, 24
192193
; GFX10-NEXT: s_lshr_b32 s8, s2, 16
194+
; GFX10-NEXT: s_and_b32 s9, 0xffff, s2
193195
; GFX10-NEXT: s_lshr_b32 s5, s5, 8
194196
; GFX10-NEXT: v_mov_b32_e32 v5, s0
195197
; GFX10-NEXT: s_lshr_b32 s0, s7, 8
196198
; GFX10-NEXT: v_mov_b32_e32 v6, s6
199+
; GFX10-NEXT: v_mov_b32_e32 v7, s1
200+
; GFX10-NEXT: s_lshr_b32 s1, s9, 8
197201
; GFX10-NEXT: v_mov_b32_e32 v8, s5
198202
; GFX10-NEXT: v_mov_b32_e32 v9, s0
199203
; GFX10-NEXT: ds_write_b8 v1, v0
@@ -204,22 +208,18 @@ define amdgpu_kernel void @store_lds_v4i32_align1(ptr addrspace(3) %out, <4 x i3
204208
; GFX10-NEXT: ds_write_b8 v1, v8 offset:1
205209
; GFX10-NEXT: ds_write_b8 v1, v9 offset:5
206210
; GFX10-NEXT: v_mov_b32_e32 v0, s8
207-
; GFX10-NEXT: s_lshr_b32 s1, s1, 24
208-
; GFX10-NEXT: s_and_b32 s9, 0xffff, s2
209-
; GFX10-NEXT: s_lshr_b32 s0, s2, 24
210-
; GFX10-NEXT: v_mov_b32_e32 v7, s1
211-
; GFX10-NEXT: s_lshr_b32 s1, s9, 8
212211
; GFX10-NEXT: v_mov_b32_e32 v3, s2
212+
; GFX10-NEXT: v_mov_b32_e32 v10, s1
213+
; GFX10-NEXT: s_lshr_b32 s0, s2, 24
214+
; GFX10-NEXT: ds_write_b8 v1, v7 offset:7
215+
; GFX10-NEXT: ds_write_b8 v1, v3 offset:8
216+
; GFX10-NEXT: ds_write_b8 v1, v10 offset:9
213217
; GFX10-NEXT: ds_write_b8 v1, v0 offset:10
214218
; GFX10-NEXT: v_mov_b32_e32 v0, s0
215219
; GFX10-NEXT: s_and_b32 s0, 0xffff, s3
216-
; GFX10-NEXT: v_mov_b32_e32 v10, s1
217-
; GFX10-NEXT: s_lshr_b32 s0, s0, 8
218220
; GFX10-NEXT: s_lshr_b32 s1, s3, 16
221+
; GFX10-NEXT: s_lshr_b32 s0, s0, 8
219222
; GFX10-NEXT: v_mov_b32_e32 v2, s3
220-
; GFX10-NEXT: ds_write_b8 v1, v7 offset:7
221-
; GFX10-NEXT: ds_write_b8 v1, v3 offset:8
222-
; GFX10-NEXT: ds_write_b8 v1, v10 offset:9
223223
; GFX10-NEXT: v_mov_b32_e32 v3, s0
224224
; GFX10-NEXT: s_lshr_b32 s0, s3, 24
225225
; GFX10-NEXT: v_mov_b32_e32 v4, s1

‎llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -272,6 +272,10 @@ define amdgpu_kernel void @v256i8_liveout(ptr addrspace(1) %src1, ptr addrspace(
272272
; GFX906-NEXT: buffer_store_dword v6, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill
273273
; GFX906-NEXT: buffer_store_dword v7, off, s[12:15], 0 offset:8 ; 4-byte Folded Spill
274274
; GFX906-NEXT: buffer_store_dword v8, off, s[12:15], 0 offset:12 ; 4-byte Folded Spill
275+
; GFX906-NEXT: global_load_dwordx4 v[5:8], v4, s[0:1] offset:16
276+
; GFX906-NEXT: s_nop 0
277+
; GFX906-NEXT: global_load_dwordx4 v[9:12], v4, s[0:1] offset:32
278+
; GFX906-NEXT: global_load_dwordx4 v[13:16], v4, s[0:1] offset:48
275279
; GFX906-NEXT: global_load_dwordx4 v[17:20], v4, s[0:1] offset:64
276280
; GFX906-NEXT: global_load_dwordx4 v[21:24], v4, s[0:1] offset:80
277281
; GFX906-NEXT: global_load_dwordx4 v[25:28], v4, s[0:1] offset:96
@@ -284,9 +288,6 @@ define amdgpu_kernel void @v256i8_liveout(ptr addrspace(1) %src1, ptr addrspace(
284288
; GFX906-NEXT: global_load_dwordx4 v[53:56], v4, s[0:1] offset:208
285289
; GFX906-NEXT: global_load_dwordx4 v[57:60], v4, s[0:1] offset:224
286290
; GFX906-NEXT: global_load_dwordx4 v[0:3], v4, s[0:1] offset:240
287-
; GFX906-NEXT: global_load_dwordx4 v[5:8], v4, s[0:1] offset:16
288-
; GFX906-NEXT: global_load_dwordx4 v[9:12], v4, s[0:1] offset:32
289-
; GFX906-NEXT: global_load_dwordx4 v[13:16], v4, s[0:1] offset:48
290291
; GFX906-NEXT: s_and_saveexec_b64 s[0:1], vcc
291292
; GFX906-NEXT: s_cbranch_execz .LBB6_2
292293
; GFX906-NEXT: ; %bb.1: ; %bb.1

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