Remove redundant check

Author: lucas-rami

llvm/lib/Target/AMDGPU/GCNRegPressure.cpp

@@ -413,9 +413,13 @@ bool GCNRPTarget::isSaveBeneficial(Register Reg) const {
 
   if (SRI->isSGPRClass(RC))
     return RP.getSGPRNum() > MaxSGPRs;
-  if (SRI->isAGPRClass(RC))
-    return isVGPRSaveBeneficial(RP.getAGPRNum(), RP.getArchVGPRNum());
-  return isVGPRSaveBeneficial(RP.getArchVGPRNum(), RP.getAGPRNum());
+  unsigned NumVGPRs =
+      SRI->isAGPRClass(RC) ? RP.getAGPRNum() : RP.getArchVGPRNum();
+  // The addressable limit must always be respected.
+  if (NumVGPRs > MaxVGPRs)
+    return true;
+  // For unified RFs, combined VGPR usage limit must be respected as well.
+  return UnifiedRF && RP.getVGPRNum(true) > MaxUnifiedVGPRs;
 }
 
 bool GCNRPTarget::satisfied() const {
@@ -426,25 +430,6 @@ bool GCNRPTarget::satisfied() const {
   return true;
 }
 
-bool GCNRPTarget::isVGPRSaveBeneficial(unsigned NumRegsInRC,
-                                       unsigned NumRegsInOtherRC) const {
-  // The addressable limit must always be respected.
-  if (NumRegsInRC > MaxVGPRs)
-    return true;
-  if (UnifiedRF) {
-    // Combined VGPR usage must be respected in unified RFs.
-    if (RP.getVGPRNum(true) > MaxUnifiedVGPRs)
-      return true;
-    // When the other VGPR RC is above its addressable limit and there is not
-    // enough space in this VGPR RC to fit all that excess through copies, we
-    // consider savings in this VGPR RC beneficial as well.
-    if (NumRegsInOtherRC > MaxVGPRs &&
-        2 * MaxVGPRs < NumRegsInRC + NumRegsInOtherRC)
-      return true;
-  }
-  return false;
-}
-
 ///////////////////////////////////////////////////////////////////////////////
 // GCNRPTracker
 

llvm/lib/Target/AMDGPU/GCNRegPressure.h

@@ -252,12 +252,6 @@ class GCNRPTarget {
   GCNRPTarget(const GCNRegPressure &RP, const MachineFunction &MF)
       : MF(MF), UnifiedRF(MF.getSubtarget<GCNSubtarget>().hasGFX90AInsts()),
         RP(RP) {}
-
-  /// Determines whether saving a VGPR from a VGPR RC (ArchVGPR or AGPR) where
-  /// \p NumRegsInRC VGPRs are used is beneficial. \p NumRegsInOtherRC is the
-  /// number of VGPRs in the other VGPR RC.
-  bool isVGPRSaveBeneficial(unsigned NumRegsInRC,
-                            unsigned NumRegsInOtherRC) const;
 };
 
 ///////////////////////////////////////////////////////////////////////////////

llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir

@@ -753,7 +753,7 @@ body:             |
     S_ENDPGM 0
 ...
 # Min/Max waves/EU is 8. For targets with non-unified RF (gfx908) we are able to
-# eliminate both ArchVGPR and AGPR spilling by saving one of each. In the 
+# eliminate both ArchVGPR and AGPR spilling by saving one of each. In the
 # unified RF case (gfx90a) the ArchVGPR allocation granule may force us to remat
 # more ArchVGPRs to eliminate spilling.
 ---