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modify test
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-56
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2 files changed

+28
-56
lines changed

‎llvm/test/CodeGen/LoongArch/lasx/and-not-combine.ll‎

Lines changed: 14 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -90,9 +90,8 @@ define void @pre_not_and_not_combine_v32i8(ptr %res, ptr %a, i8 %b) nounwind {
9090
; CHECK-LABEL: pre_not_and_not_combine_v32i8:
9191
; CHECK: # %bb.0:
9292
; CHECK-NEXT: xvld $xr0, $a1, 0
93-
; CHECK-NEXT: nor $a1, $a2, $zero
94-
; CHECK-NEXT: xvreplgr2vr.b $xr1, $a1
95-
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
93+
; CHECK-NEXT: xvreplgr2vr.b $xr1, $a2
94+
; CHECK-NEXT: xvnor.v $xr0, $xr0, $xr1
9695
; CHECK-NEXT: xvst $xr0, $a0, 0
9796
; CHECK-NEXT: ret
9897
%v0 = load <32 x i8>, ptr %a
@@ -110,8 +109,7 @@ define void @post_not_and_not_combine_v32i8(ptr %res, ptr %a, i8 %b) nounwind {
110109
; CHECK: # %bb.0:
111110
; CHECK-NEXT: xvld $xr0, $a1, 0
112111
; CHECK-NEXT: xvreplgr2vr.b $xr1, $a2
113-
; CHECK-NEXT: xvxori.b $xr1, $xr1, 255
114-
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
112+
; CHECK-NEXT: xvnor.v $xr0, $xr0, $xr1
115113
; CHECK-NEXT: xvst $xr0, $a0, 0
116114
; CHECK-NEXT: ret
117115
%v0 = load <32 x i8>, ptr %a
@@ -128,9 +126,8 @@ define void @pre_not_and_not_combine_v16i16(ptr %res, ptr %a, i16 %b) nounwind {
128126
; CHECK-LABEL: pre_not_and_not_combine_v16i16:
129127
; CHECK: # %bb.0:
130128
; CHECK-NEXT: xvld $xr0, $a1, 0
131-
; CHECK-NEXT: nor $a1, $a2, $zero
132-
; CHECK-NEXT: xvreplgr2vr.h $xr1, $a1
133-
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
129+
; CHECK-NEXT: xvreplgr2vr.h $xr1, $a2
130+
; CHECK-NEXT: xvnor.v $xr0, $xr0, $xr1
134131
; CHECK-NEXT: xvst $xr0, $a0, 0
135132
; CHECK-NEXT: ret
136133
%v0 = load <16 x i16>, ptr %a
@@ -148,9 +145,7 @@ define void @post_not_and_not_combine_v16i16(ptr %res, ptr %a, i16 %b) nounwind
148145
; CHECK: # %bb.0:
149146
; CHECK-NEXT: xvld $xr0, $a1, 0
150147
; CHECK-NEXT: xvreplgr2vr.h $xr1, $a2
151-
; CHECK-NEXT: xvrepli.b $xr2, -1
152-
; CHECK-NEXT: xvxor.v $xr1, $xr1, $xr2
153-
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
148+
; CHECK-NEXT: xvnor.v $xr0, $xr0, $xr1
154149
; CHECK-NEXT: xvst $xr0, $a0, 0
155150
; CHECK-NEXT: ret
156151
%v0 = load <16 x i16>, ptr %a
@@ -167,9 +162,8 @@ define void @pre_not_and_not_combine_v8i32(ptr %res, ptr %a, i32 %b) nounwind {
167162
; CHECK-LABEL: pre_not_and_not_combine_v8i32:
168163
; CHECK: # %bb.0:
169164
; CHECK-NEXT: xvld $xr0, $a1, 0
170-
; CHECK-NEXT: nor $a1, $a2, $zero
171-
; CHECK-NEXT: xvreplgr2vr.w $xr1, $a1
172-
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
165+
; CHECK-NEXT: xvreplgr2vr.w $xr1, $a2
166+
; CHECK-NEXT: xvnor.v $xr0, $xr0, $xr1
173167
; CHECK-NEXT: xvst $xr0, $a0, 0
174168
; CHECK-NEXT: ret
175169
%v0 = load <8 x i32>, ptr %a
@@ -187,9 +181,7 @@ define void @post_not_and_not_combine_v8i32(ptr %res, ptr %a, i32 %b) nounwind {
187181
; CHECK: # %bb.0:
188182
; CHECK-NEXT: xvld $xr0, $a1, 0
189183
; CHECK-NEXT: xvreplgr2vr.w $xr1, $a2
190-
; CHECK-NEXT: xvrepli.b $xr2, -1
191-
; CHECK-NEXT: xvxor.v $xr1, $xr1, $xr2
192-
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
184+
; CHECK-NEXT: xvnor.v $xr0, $xr0, $xr1
193185
; CHECK-NEXT: xvst $xr0, $a0, 0
194186
; CHECK-NEXT: ret
195187
%v0 = load <8 x i32>, ptr %a
@@ -218,9 +210,8 @@ define void @pre_not_and_not_combine_v4i64(ptr %res, ptr %a, i64 %b) nounwind {
218210
; LA64-LABEL: pre_not_and_not_combine_v4i64:
219211
; LA64: # %bb.0:
220212
; LA64-NEXT: xvld $xr0, $a1, 0
221-
; LA64-NEXT: nor $a1, $a2, $zero
222-
; LA64-NEXT: xvreplgr2vr.d $xr1, $a1
223-
; LA64-NEXT: xvandn.v $xr0, $xr0, $xr1
213+
; LA64-NEXT: xvreplgr2vr.d $xr1, $a2
214+
; LA64-NEXT: xvnor.v $xr0, $xr0, $xr1
224215
; LA64-NEXT: xvst $xr0, $a0, 0
225216
; LA64-NEXT: ret
226217
%v0 = load <4 x i64>, ptr %a
@@ -240,19 +231,15 @@ define void @post_not_and_not_combine_v4i64(ptr %res, ptr %a, i64 %b) nounwind {
240231
; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 0
241232
; LA32-NEXT: vinsgr2vr.w $vr1, $a3, 1
242233
; LA32-NEXT: xvreplve0.d $xr1, $xr1
243-
; LA32-NEXT: xvrepli.b $xr2, -1
244-
; LA32-NEXT: xvxor.v $xr1, $xr1, $xr2
245-
; LA32-NEXT: xvandn.v $xr0, $xr0, $xr1
234+
; LA32-NEXT: xvnor.v $xr0, $xr0, $xr1
246235
; LA32-NEXT: xvst $xr0, $a0, 0
247236
; LA32-NEXT: ret
248237
;
249238
; LA64-LABEL: post_not_and_not_combine_v4i64:
250239
; LA64: # %bb.0:
251240
; LA64-NEXT: xvld $xr0, $a1, 0
252241
; LA64-NEXT: xvreplgr2vr.d $xr1, $a2
253-
; LA64-NEXT: xvrepli.b $xr2, -1
254-
; LA64-NEXT: xvxor.v $xr1, $xr1, $xr2
255-
; LA64-NEXT: xvandn.v $xr0, $xr0, $xr1
242+
; LA64-NEXT: xvnor.v $xr0, $xr0, $xr1
256243
; LA64-NEXT: xvst $xr0, $a0, 0
257244
; LA64-NEXT: ret
258245
%v0 = load <4 x i64>, ptr %a
@@ -269,8 +256,7 @@ define void @and_not_combine_splatimm_v32i8(ptr %res, ptr %a0) nounwind {
269256
; CHECK-LABEL: and_not_combine_splatimm_v32i8:
270257
; CHECK: # %bb.0:
271258
; CHECK-NEXT: xvld $xr0, $a1, 0
272-
; CHECK-NEXT: xvrepli.b $xr1, -4
273-
; CHECK-NEXT: xvandn.v $xr0, $xr0, $xr1
259+
; CHECK-NEXT: xvnori.b $xr0, $xr0, 3
274260
; CHECK-NEXT: xvst $xr0, $a0, 0
275261
; CHECK-NEXT: ret
276262
%v0 = load <32 x i8>, ptr %a0

‎llvm/test/CodeGen/LoongArch/lsx/and-not-combine.ll‎

Lines changed: 14 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -90,9 +90,8 @@ define void @pre_not_and_not_combine_v16i8(ptr %res, ptr %a, i8 %b) nounwind {
9090
; CHECK-LABEL: pre_not_and_not_combine_v16i8:
9191
; CHECK: # %bb.0:
9292
; CHECK-NEXT: vld $vr0, $a1, 0
93-
; CHECK-NEXT: nor $a1, $a2, $zero
94-
; CHECK-NEXT: vreplgr2vr.b $vr1, $a1
95-
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
93+
; CHECK-NEXT: vreplgr2vr.b $vr1, $a2
94+
; CHECK-NEXT: vnor.v $vr0, $vr0, $vr1
9695
; CHECK-NEXT: vst $vr0, $a0, 0
9796
; CHECK-NEXT: ret
9897
%v0 = load <16 x i8>, ptr %a
@@ -110,8 +109,7 @@ define void @post_not_and_not_combine_v16i8(ptr %res, ptr %a, i8 %b) nounwind {
110109
; CHECK: # %bb.0:
111110
; CHECK-NEXT: vld $vr0, $a1, 0
112111
; CHECK-NEXT: vreplgr2vr.b $vr1, $a2
113-
; CHECK-NEXT: vxori.b $vr1, $vr1, 255
114-
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
112+
; CHECK-NEXT: vnor.v $vr0, $vr0, $vr1
115113
; CHECK-NEXT: vst $vr0, $a0, 0
116114
; CHECK-NEXT: ret
117115
%v0 = load <16 x i8>, ptr %a
@@ -128,9 +126,8 @@ define void @pre_not_and_not_combine_v8i16(ptr %res, ptr %a, i16 %b) nounwind {
128126
; CHECK-LABEL: pre_not_and_not_combine_v8i16:
129127
; CHECK: # %bb.0:
130128
; CHECK-NEXT: vld $vr0, $a1, 0
131-
; CHECK-NEXT: nor $a1, $a2, $zero
132-
; CHECK-NEXT: vreplgr2vr.h $vr1, $a1
133-
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
129+
; CHECK-NEXT: vreplgr2vr.h $vr1, $a2
130+
; CHECK-NEXT: vnor.v $vr0, $vr0, $vr1
134131
; CHECK-NEXT: vst $vr0, $a0, 0
135132
; CHECK-NEXT: ret
136133
%v0 = load <8 x i16>, ptr %a
@@ -148,9 +145,7 @@ define void @post_not_and_not_combine_v8i16(ptr %res, ptr %a, i16 %b) nounwind {
148145
; CHECK: # %bb.0:
149146
; CHECK-NEXT: vld $vr0, $a1, 0
150147
; CHECK-NEXT: vreplgr2vr.h $vr1, $a2
151-
; CHECK-NEXT: vrepli.b $vr2, -1
152-
; CHECK-NEXT: vxor.v $vr1, $vr1, $vr2
153-
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
148+
; CHECK-NEXT: vnor.v $vr0, $vr0, $vr1
154149
; CHECK-NEXT: vst $vr0, $a0, 0
155150
; CHECK-NEXT: ret
156151
%v0 = load <8 x i16>, ptr %a
@@ -167,9 +162,8 @@ define void @pre_not_and_not_combine_v4i32(ptr %res, ptr %a, i32 %b) nounwind {
167162
; CHECK-LABEL: pre_not_and_not_combine_v4i32:
168163
; CHECK: # %bb.0:
169164
; CHECK-NEXT: vld $vr0, $a1, 0
170-
; CHECK-NEXT: nor $a1, $a2, $zero
171-
; CHECK-NEXT: vreplgr2vr.w $vr1, $a1
172-
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
165+
; CHECK-NEXT: vreplgr2vr.w $vr1, $a2
166+
; CHECK-NEXT: vnor.v $vr0, $vr0, $vr1
173167
; CHECK-NEXT: vst $vr0, $a0, 0
174168
; CHECK-NEXT: ret
175169
%v0 = load <4 x i32>, ptr %a
@@ -187,9 +181,7 @@ define void @post_not_and_not_combine_v4i32(ptr %res, ptr %a, i32 %b) nounwind {
187181
; CHECK: # %bb.0:
188182
; CHECK-NEXT: vld $vr0, $a1, 0
189183
; CHECK-NEXT: vreplgr2vr.w $vr1, $a2
190-
; CHECK-NEXT: vrepli.b $vr2, -1
191-
; CHECK-NEXT: vxor.v $vr1, $vr1, $vr2
192-
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
184+
; CHECK-NEXT: vnor.v $vr0, $vr0, $vr1
193185
; CHECK-NEXT: vst $vr0, $a0, 0
194186
; CHECK-NEXT: ret
195187
%v0 = load <4 x i32>, ptr %a
@@ -218,9 +210,8 @@ define void @pre_not_and_not_combine_v2i64(ptr %res, ptr %a, i64 %b) nounwind {
218210
; LA64-LABEL: pre_not_and_not_combine_v2i64:
219211
; LA64: # %bb.0:
220212
; LA64-NEXT: vld $vr0, $a1, 0
221-
; LA64-NEXT: nor $a1, $a2, $zero
222-
; LA64-NEXT: vreplgr2vr.d $vr1, $a1
223-
; LA64-NEXT: vandn.v $vr0, $vr0, $vr1
213+
; LA64-NEXT: vreplgr2vr.d $vr1, $a2
214+
; LA64-NEXT: vnor.v $vr0, $vr0, $vr1
224215
; LA64-NEXT: vst $vr0, $a0, 0
225216
; LA64-NEXT: ret
226217
%v0 = load <2 x i64>, ptr %a
@@ -240,19 +231,15 @@ define void @post_not_and_not_combine_v2i64(ptr %res, ptr %a, i64 %b) nounwind {
240231
; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 0
241232
; LA32-NEXT: vinsgr2vr.w $vr1, $a3, 1
242233
; LA32-NEXT: vreplvei.d $vr1, $vr1, 0
243-
; LA32-NEXT: vrepli.b $vr2, -1
244-
; LA32-NEXT: vxor.v $vr1, $vr1, $vr2
245-
; LA32-NEXT: vandn.v $vr0, $vr0, $vr1
234+
; LA32-NEXT: vnor.v $vr0, $vr0, $vr1
246235
; LA32-NEXT: vst $vr0, $a0, 0
247236
; LA32-NEXT: ret
248237
;
249238
; LA64-LABEL: post_not_and_not_combine_v2i64:
250239
; LA64: # %bb.0:
251240
; LA64-NEXT: vld $vr0, $a1, 0
252241
; LA64-NEXT: vreplgr2vr.d $vr1, $a2
253-
; LA64-NEXT: vrepli.b $vr2, -1
254-
; LA64-NEXT: vxor.v $vr1, $vr1, $vr2
255-
; LA64-NEXT: vandn.v $vr0, $vr0, $vr1
242+
; LA64-NEXT: vnor.v $vr0, $vr0, $vr1
256243
; LA64-NEXT: vst $vr0, $a0, 0
257244
; LA64-NEXT: ret
258245
%v0 = load <2 x i64>, ptr %a
@@ -269,8 +256,7 @@ define void @and_not_combine_splatimm_v16i8(ptr %res, ptr %a0) nounwind {
269256
; CHECK-LABEL: and_not_combine_splatimm_v16i8:
270257
; CHECK: # %bb.0:
271258
; CHECK-NEXT: vld $vr0, $a1, 0
272-
; CHECK-NEXT: vrepli.b $vr1, -4
273-
; CHECK-NEXT: vandn.v $vr0, $vr0, $vr1
259+
; CHECK-NEXT: vnori.b $vr0, $vr0, 3
274260
; CHECK-NEXT: vst $vr0, $a0, 0
275261
; CHECK-NEXT: ret
276262
%v0 = load <16 x i8>, ptr %a0

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