Format

Author: Temperz87

clang/lib/AST/ByteCode/InterpBuiltin.cpp

@@ -3423,7 +3423,6 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
           return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
         });
 
-  
   case clang::X86::BI__builtin_ia32_pmulhrsw128:
   case clang::X86::BI__builtin_ia32_pmulhrsw256:
   case clang::X86::BI__builtin_ia32_pmulhrsw512:

clang/lib/AST/ExprConstant.cpp

@@ -11728,7 +11728,7 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
   case clang::X86::BI__builtin_ia32_pmulhrsw128:
   case clang::X86::BI__builtin_ia32_pmulhrsw256:
   case clang::X86::BI__builtin_ia32_pmulhrsw512:
-    return EvaluateBinOpExpr([](const APSInt &LHS, const APSInt& RHS) {
+    return EvaluateBinOpExpr([](const APSInt &LHS, const APSInt &RHS) {
       unsigned Width = LHS.getBitWidth();
       APInt Mul = llvm::APIntOps::mulhs(LHS, RHS);
       Mul = Mul.relativeLShr(14);

clang/lib/Headers/avx2intrin.h

@@ -1659,8 +1659,7 @@ _mm256_mul_epi32(__m256i __a, __m256i __b) {
 ///    A 256-bit vector of [16 x i16] containing one of the source operands.
 /// \returns A 256-bit vector of [16 x i16] containing the rounded products.
 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
-_mm256_mulhrs_epi16(__m256i __a, __m256i __b)
-{
+_mm256_mulhrs_epi16(__m256i __a, __m256i __b) {
   return (__m256i)__builtin_ia32_pmulhrsw256((__v16hi)__a, (__v16hi)__b);
 }
 
@@ -1678,8 +1677,7 @@ _mm256_mulhrs_epi16(__m256i __a, __m256i __b)
 ///    A 256-bit vector of [16 x i16] containing one of the source operands.
 /// \returns A 256-bit vector of [16 x i16] containing the products.
 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
-_mm256_mulhi_epu16(__m256i __a, __m256i __b)
-{
+_mm256_mulhi_epu16(__m256i __a, __m256i __b) {
   return (__m256i)__builtin_ia32_pmulhuw256((__v16hu)__a, (__v16hu)__b);
 }
 

clang/lib/Headers/tmmintrin.h

@@ -559,8 +559,7 @@ _mm_maddubs_pi16(__m64 __a, __m64 __b)
 /// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled
 ///    products of both operands.
 static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
-_mm_mulhrs_epi16(__m128i __a, __m128i __b)
-{
+_mm_mulhrs_epi16(__m128i __a, __m128i __b) {
     return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b);
 }
 
@@ -579,8 +578,7 @@ _mm_mulhrs_epi16(__m128i __a, __m128i __b)
 /// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled
 ///    products of both operands.
 static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
-_mm_mulhrs_pi16(__m64 __a, __m64 __b)
-{
+_mm_mulhrs_pi16(__m64 __a, __m64 __b) {
     return __trunc64(__builtin_ia32_pmulhrsw128((__v8hi)__zext128(__a),
                                                 (__v8hi)__zext128(__b)));
 }