@@ -25,3 +25,73 @@ entry:
2525 store float %1 , ptr %y
2626 ret void
2727}
28+
29+ define float @test_without_nneg (i32 %x ) nounwind {
30+ ; X86-LABEL: test_without_nneg:
31+ ; X86: ## %bb.0:
32+ ; X86-NEXT: pushl %eax
33+ ; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
34+ ; X86-NEXT: orpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
35+ ; X86-NEXT: subsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
36+ ; X86-NEXT: cvtsd2ss %xmm0, %xmm0
37+ ; X86-NEXT: movss %xmm0, (%esp)
38+ ; X86-NEXT: flds (%esp)
39+ ; X86-NEXT: popl %eax
40+ ; X86-NEXT: retl
41+ ;
42+ ; X64-LABEL: test_without_nneg:
43+ ; X64: ## %bb.0:
44+ ; X64-NEXT: movl %edi, %eax
45+ ; X64-NEXT: cvtsi2ss %rax, %xmm0
46+ ; X64-NEXT: retq
47+ %r = uitofp i32 %x to float
48+ ret float %r
49+ }
50+
51+ define float @test_with_nneg (i32 %x ) nounwind {
52+ ; X86-LABEL: test_with_nneg:
53+ ; X86: ## %bb.0:
54+ ; X86-NEXT: pushl %eax
55+ ; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
56+ ; X86-NEXT: orpd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
57+ ; X86-NEXT: subsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
58+ ; X86-NEXT: cvtsd2ss %xmm0, %xmm0
59+ ; X86-NEXT: movss %xmm0, (%esp)
60+ ; X86-NEXT: flds (%esp)
61+ ; X86-NEXT: popl %eax
62+ ; X86-NEXT: retl
63+ ;
64+ ; X64-LABEL: test_with_nneg:
65+ ; X64: ## %bb.0:
66+ ; X64-NEXT: movl %edi, %eax
67+ ; X64-NEXT: cvtsi2ss %rax, %xmm0
68+ ; X64-NEXT: retq
69+ %r = uitofp nneg i32 %x to float
70+ ret float %r
71+ }
72+
73+ define <4 x float > @test_with_nneg_vec (<4 x i32 > %x ) nounwind {
74+ ; X86-LABEL: test_with_nneg_vec:
75+ ; X86: ## %bb.0:
76+ ; X86-NEXT: movdqa {{.*#+}} xmm1 = [65535,65535,65535,65535]
77+ ; X86-NEXT: pand %xmm0, %xmm1
78+ ; X86-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
79+ ; X86-NEXT: psrld $16, %xmm0
80+ ; X86-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
81+ ; X86-NEXT: subps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
82+ ; X86-NEXT: addps %xmm1, %xmm0
83+ ; X86-NEXT: retl
84+ ;
85+ ; X64-LABEL: test_with_nneg_vec:
86+ ; X64: ## %bb.0:
87+ ; X64-NEXT: movdqa {{.*#+}} xmm1 = [65535,65535,65535,65535]
88+ ; X64-NEXT: pand %xmm0, %xmm1
89+ ; X64-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
90+ ; X64-NEXT: psrld $16, %xmm0
91+ ; X64-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
92+ ; X64-NEXT: subps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
93+ ; X64-NEXT: addps %xmm1, %xmm0
94+ ; X64-NEXT: retq
95+ %r = uitofp nneg <4 x i32 > %x to <4 x float >
96+ ret <4 x float > %r
97+ }
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