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[MLIR][AMDGPU] Bump to COV6 (#133849)
We already bump to COV6 by default in the front-end and backend. This PR is for MLIR. Note that COV6 requires ROCm 6.3+.
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+14
-10
lines changed

6 files changed

+14
-10
lines changed

mlir/include/mlir/Dialect/GPU/Transforms/Passes.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -186,7 +186,7 @@ def GpuROCDLAttachTarget: Pass<"rocdl-attach-target", ""> {
186186
/*default=*/"\"\"",
187187
"Target features.">,
188188
Option<"abiVersion", "abi", "std::string",
189-
/*default=*/"\"500\"",
189+
/*default=*/"\"600\"",
190190
"ABI version.">,
191191
Option<"optLevel", "O", "unsigned",
192192
/*default=*/"2",

mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -680,7 +680,7 @@ def ROCDL_V2BF16Type : FixedVectorOfLengthAndType<[2], [BF16]>,
680680
BuildableType<"::mlir::VectorType::get("
681681
"{2},$_builder.getBF16Type())">;
682682

683-
// TODO: The word and byte selectors are immarg in LLVM
683+
// TODO: The word and byte selectors are immarg in LLVM
684684
// update to be attributes in MLIR
685685
//===---------------------------------------------------------------------===//
686686
// 16-bit float intrinsics
@@ -1129,7 +1129,7 @@ def ROCDL_TargetAttr :
11291129
StringRefParameter<"Target chip features.", "\"\"">:$features,
11301130
// Also update the default builder below and rocdl-attach-target in
11311131
// Dialect/GPU/Transforms/Passes.td .
1132-
StringRefParameter<"ABI version.", "\"500\"">:$abi,
1132+
StringRefParameter<"ABI version.", "\"600\"">:$abi,
11331133
OptionalParameter<"DictionaryAttr", "Target specific flags.">:$flags,
11341134
OptionalParameter<"ArrayAttr", "Files to link to the LLVM module.">:$link
11351135
);
@@ -1141,7 +1141,7 @@ def ROCDL_TargetAttr :
11411141
CArg<"StringRef", "\"amdgcn-amd-amdhsa\"">:$triple,
11421142
CArg<"StringRef", "\"gfx900\"">:$chip,
11431143
CArg<"StringRef", "\"\"">:$features,
1144-
CArg<"StringRef", "\"500\"">:$abiVersion,
1144+
CArg<"StringRef", "\"600\"">:$abiVersion,
11451145
CArg<"DictionaryAttr", "nullptr">:$targetFlags,
11461146
CArg<"ArrayAttr", "nullptr">:$linkFiles), [{
11471147
return Base::get($_ctxt, optLevel, triple, chip, features, abiVersion,

mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -234,8 +234,8 @@ ROCDLTargetAttr::verify(function_ref<InFlightDiagnostic()> emitError,
234234
emitError() << "The target chip cannot be empty.";
235235
return failure();
236236
}
237-
if (abiVersion != "400" && abiVersion != "500") {
238-
emitError() << "Invalid ABI version, it must be either `400` or `500`.";
237+
if (abiVersion != "400" && abiVersion != "500" && abiVersion != "600") {
238+
emitError() << "Invalid ABI version, it must be `400`, `500` or '600'.";
239239
return failure();
240240
}
241241
if (files && !llvm::all_of(files, [](::mlir::Attribute attr) {

mlir/lib/Target/LLVM/ROCDL/Target.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -248,7 +248,8 @@ void SerializeGPUModuleBase::addControlVariables(
248248
controlVariable->setUnnamedAddr(llvm::GlobalValue::UnnamedAddr::Local);
249249
};
250250

251-
int abi = 500;
251+
// Note that COV6 requires ROCm 6.3+.
252+
int abi = 600;
252253
abiVer.getAsInteger(0, abi);
253254
module.addModuleFlag(llvm::Module::Error, "amdhsa_code_object_version", abi);
254255
// Return if no device libraries are required.

mlir/test/Dialect/LLVMIR/rocdl.mlir

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -765,8 +765,8 @@ llvm.func @rocdl_8bit_floats(%source: i32, %source_half: f16, %source_bfloat: bf
765765
// CHECK: rocdl.cvt.f32.fp8
766766
// CHECK: rocdl.cvt.scalef32.f32.bf8
767767
// CHECK: rocdl.cvt.scalef32.f32.fp8
768-
// CHECK: rocdl.cvt.scalef32.pk.f16.bf8
769-
// CHECK: rocdl.cvt.scalef32.pk.f16.fp8
768+
// CHECK: rocdl.cvt.scalef32.pk.f16.bf8
769+
// CHECK: rocdl.cvt.scalef32.pk.f16.fp8
770770
// CHECK: rocdl.cvt.scalef32.pk.bf16.bf8
771771
// CHECK: rocdl.cvt.scalef32.pk.bf16.fp8
772772
// CHECK: rocdl.cvt.scalef32.f16.fp8
@@ -900,3 +900,6 @@ gpu.module @module_1 [#rocdl.target<O = 1, chip = "gfx900", abi = "500", link =
900900

901901
gpu.module @module_2 [#rocdl.target<chip = "gfx900">, #rocdl.target<chip = "gfx90a">] {
902902
}
903+
904+
gpu.module @module_3 [#rocdl.target<O = 1, chip = "gfx900", abi = "600", link = ["my_device_lib.bc"], flags = {fast, daz, unsafe_math}>] {
905+
}

mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@ TEST_F(MLIRTargetLLVMROCDL,
125125
serializer.serializeToObject(gpuModule, options);
126126
// Check that the serializer was successful.
127127
EXPECT_TRUE(StringRef(object->data(), object->size())
128-
.contains(".amdhsa_code_object_version 5"));
128+
.contains(".amdhsa_code_object_version 6"));
129129
}
130130
}
131131

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