@@ -245,12 +245,11 @@ exit:
245245define i32 @test_sgt_samesign (i32 %start , i32 %inv_1 , i32 %inv_2 ) {
246246; CHECK-LABEL: @test_sgt_samesign(
247247; CHECK-NEXT: entry:
248+ ; CHECK-NEXT: [[INVARIANT_UMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[INV_1:%.*]], i32 [[INV_2:%.*]])
248249; CHECK-NEXT: br label [[LOOP:%.*]]
249250; CHECK: loop:
250251; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
251- ; CHECK-NEXT: [[CMP_1:%.*]] = icmp samesign ugt i32 [[IV]], [[INV_1:%.*]]
252- ; CHECK-NEXT: [[CMP_2:%.*]] = icmp sgt i32 [[IV]], [[INV_2:%.*]]
253- ; CHECK-NEXT: [[LOOP_COND:%.*]] = and i1 [[CMP_1]], [[CMP_2]]
252+ ; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp sgt i32 [[IV]], [[INVARIANT_UMAX]]
254253; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
255254; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
256255; CHECK: exit:
@@ -305,14 +304,13 @@ exit:
305304define i32 @test_sge_samesign (i32 %start , i32 %inv_1 , i32 %inv_2 ) {
306305; CHECK-LABEL: @test_sge_samesign(
307306; CHECK-NEXT: entry:
307+ ; CHECK-NEXT: [[INV_1:%.*]] = call i32 @llvm.smax.i32(i32 [[INV_3:%.*]], i32 [[INV_2:%.*]])
308308; CHECK-NEXT: br label [[LOOP:%.*]]
309309; CHECK: loop:
310310; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
311- ; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[IV]], [[INV_1:%.*]]
312- ; CHECK-NEXT: [[CMP_2:%.*]] = icmp samesign uge i32 [[IV]], [[INV_2:%.*]]
313- ; CHECK-NEXT: [[LOOP_COND:%.*]] = and i1 [[CMP_1]], [[CMP_2]]
311+ ; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[IV]], [[INV_1]]
314312; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
315- ; CHECK-NEXT: br i1 [[LOOP_COND ]], label [[LOOP]], label [[EXIT:%.*]]
313+ ; CHECK-NEXT: br i1 [[CMP_1 ]], label [[LOOP]], label [[EXIT:%.*]]
316314; CHECK: exit:
317315; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i32 [ [[IV]], [[LOOP]] ]
318316; CHECK-NEXT: ret i32 [[IV_LCSSA]]
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