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[AArch64][llvm] Add instructions for FEAT_MOPS_GO
Add the following `FEAT_MOPS_GO` instructions: * `SETGOP`, `SETGOM`, `SETGOE` * `SETGOPN`, `SETGOMN`, `SETGOEN` * `SETGOPT`, `SETGOMT`, `SETGOET` * `SETGOPTN`, `SETGOMTN`, `SETGOETN` as documented here: https://developer.arm.com/documentation/109697/2025_09/Future-Architecture-Technologies
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‎clang/test/Driver/aarch64-vfat.c‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,3 +13,7 @@
1313
// RUN: %clang -target aarch64 -march=armv9.7a+btie -### -c %s 2>&1 | FileCheck -check-prefix=VFAT-BTIE %s
1414
// RUN: %clang -target aarch64 -march=armv9.7-a+btie -### -c %s 2>&1 | FileCheck -check-prefix=VFAT-BTIE %s
1515
// VFAT-BTIE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+btie"
16+
17+
// RUN: %clang -target aarch64 -march=armv9.7a+mops-go -### -c %s 2>&1 | FileCheck -check-prefix=VFAT-MOPS-GO %s
18+
// RUN: %clang -target aarch64 -march=armv9.7-a+mops-go -### -c %s 2>&1 | FileCheck -check-prefix=VFAT-MOPS-GO %s
19+
// VFAT-MOPS-GO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.7a"{{.*}} "-target-feature" "+mops-go"

‎clang/test/Driver/print-supported-extensions-aarch64.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,7 @@
5050
// CHECK-NEXT: lsui FEAT_LSUI Enable Armv9.6-A unprivileged load/store instructions
5151
// CHECK-NEXT: lut FEAT_LUT Enable Lookup Table instructions
5252
// CHECK-NEXT: mops FEAT_MOPS Enable Armv8.8-A memcpy and memset acceleration instructions
53+
// CHECK-NEXT: mops-go FEAT_MOPS_GO Enable memset acceleration granule only
5354
// CHECK-NEXT: mpamv2 FEAT_MPAMv2 Enable Armv9.7-A MPAMv2 Lookaside Buffer Invalidate instructions
5455
// CHECK-NEXT: memtag FEAT_MTE, FEAT_MTE2 Enable Memory Tagging Extension
5556
// CHECK-NEXT: mtetc FEAT_MTETC Enable Virtual Memory Tagging Extension

‎llvm/lib/Target/AArch64/AArch64Features.td‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -638,6 +638,9 @@ def FeatureS1POE2: ExtensionWithMArch<"poe2", "POE2", "FEAT_S1POE2",
638638
def FeatureTEV: ExtensionWithMArch<"tev", "TEV", "FEAT_TEV",
639639
"Enable TIndex Exception-like Vector instructions">;
640640

641+
def FeatureMOPS_GO: ExtensionWithMArch<"mops-go", "MOPS_GO", "FEAT_MOPS_GO",
642+
"Enable memset acceleration granule only">;
643+
641644
//===----------------------------------------------------------------------===//
642645
// Other Features
643646
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/AArch64/AArch64InstrFormats.td‎

Lines changed: 25 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -12604,7 +12604,7 @@ class MOPSMemoryMove<bits<2> opcode, bits<2> op1, bits<2> op2, string asm>
1260412604
: MOPSMemoryCopyMoveBase<1, opcode, op1, op2, asm>;
1260512605

1260612606
class MOPSMemorySetBase<bit isTagging, bits<2> opcode, bit op1, bit op2,
12607-
string asm>
12607+
bit op3, string asm>
1260812608
: I<(outs GPR64common:$Rd_wb, GPR64:$Rn_wb),
1260912609
(ins GPR64common:$Rd, GPR64:$Rn, GPR64:$Rm),
1261012610
asm, "\t[$Rd]!, $Rn!, $Rm",
@@ -12620,7 +12620,8 @@ class MOPSMemorySetBase<bit isTagging, bits<2> opcode, bit op1, bit op2,
1262012620
let Inst{15-14} = opcode;
1262112621
let Inst{13} = op2;
1262212622
let Inst{12} = op1;
12623-
let Inst{11-10} = 0b01;
12623+
let Inst{11} = 0b0;
12624+
let Inst{10} = op3;
1262412625
let Inst{9-5} = Rn;
1262512626
let Inst{4-0} = Rd;
1262612627

@@ -12629,11 +12630,11 @@ class MOPSMemorySetBase<bit isTagging, bits<2> opcode, bit op1, bit op2,
1262912630
let mayStore = 1;
1263012631
}
1263112632

12632-
class MOPSMemorySet<bits<2> opcode, bit op1, bit op2, string asm>
12633-
: MOPSMemorySetBase<0, opcode, op1, op2, asm>;
12633+
class MOPSMemorySet<bits<2> opcode, bit op1, bit op2, bit op3, string asm>
12634+
: MOPSMemorySetBase<0, opcode, op1, op2, op3, asm>;
1263412635

12635-
class MOPSMemorySetTagging<bits<2> opcode, bit op1, bit op2, string asm>
12636-
: MOPSMemorySetBase<1, opcode, op1, op2, asm>;
12636+
class MOPSMemorySetTagging<bits<2> opcode, bit op1, bit op2, bit op3, string asm>
12637+
: MOPSMemorySetBase<1, opcode, op1, op2, op3, asm>;
1263712638

1263812639
multiclass MOPSMemoryCopyInsns<bits<2> opcode, string asm> {
1263912640
def "" : MOPSMemoryCopy<opcode, 0b00, 0b00, asm>;
@@ -12674,17 +12675,27 @@ multiclass MOPSMemoryMoveInsns<bits<2> opcode, string asm> {
1267412675
}
1267512676

1267612677
multiclass MOPSMemorySetInsns<bits<2> opcode, string asm> {
12677-
def "" : MOPSMemorySet<opcode, 0, 0, asm>;
12678-
def T : MOPSMemorySet<opcode, 1, 0, asm # "t">;
12679-
def N : MOPSMemorySet<opcode, 0, 1, asm # "n">;
12680-
def TN : MOPSMemorySet<opcode, 1, 1, asm # "tn">;
12678+
def "" : MOPSMemorySet<opcode, 0, 0, 1, asm>;
12679+
def T : MOPSMemorySet<opcode, 1, 0, 1, asm # "t">;
12680+
def N : MOPSMemorySet<opcode, 0, 1, 1, asm # "n">;
12681+
def TN : MOPSMemorySet<opcode, 1, 1, 1, asm # "tn">;
1268112682
}
1268212683

1268312684
multiclass MOPSMemorySetTaggingInsns<bits<2> opcode, string asm> {
12684-
def "" : MOPSMemorySetTagging<opcode, 0, 0, asm>;
12685-
def T : MOPSMemorySetTagging<opcode, 1, 0, asm # "t">;
12686-
def N : MOPSMemorySetTagging<opcode, 0, 1, asm # "n">;
12687-
def TN : MOPSMemorySetTagging<opcode, 1, 1, asm # "tn">;
12685+
def "" : MOPSMemorySetTagging<opcode, 0, 0, 1, asm>;
12686+
def T : MOPSMemorySetTagging<opcode, 1, 0, 1, asm # "t">;
12687+
def N : MOPSMemorySetTagging<opcode, 0, 1, 1, asm # "n">;
12688+
def TN : MOPSMemorySetTagging<opcode, 1, 1, 1, asm # "tn">;
12689+
}
12690+
12691+
//----------------------------------------------------------------------------
12692+
// MOPS Granule Only - FEAT_MOPS_GO
12693+
//----------------------------------------------------------------------------
12694+
multiclass MOPSGoMemorySetTaggingInsns<bits<2> opcode, string asm> {
12695+
def "" : MOPSMemorySetTagging<opcode, 0, 0, 0, asm>;
12696+
def T : MOPSMemorySetTagging<opcode, 1, 0, 0, asm # "t">;
12697+
def N : MOPSMemorySetTagging<opcode, 0, 1, 0, asm # "n">;
12698+
def TN : MOPSMemorySetTagging<opcode, 1, 1, 0, asm # "tn">;
1268812699
}
1268912700

1269012701
//----------------------------------------------------------------------------

‎llvm/lib/Target/AArch64/AArch64InstrInfo.td‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -411,6 +411,8 @@ def HasS1POE2 : Predicate<"Subtarget->hasS1POE2()">,
411411
AssemblerPredicateWithAll<(all_of FeatureS1POE2), "poe2">;
412412
def HasTEV : Predicate<"Subtarget->hasTEV()">,
413413
AssemblerPredicateWithAll<(all_of FeatureTEV), "tev">;
414+
def HasMOPS_GO : Predicate<"Subtarget->hasMOPS_GO()">,
415+
AssemblerPredicateWithAll<(all_of FeatureMOPS_GO), "mops-go">;
414416
def IsLE : Predicate<"Subtarget->isLittleEndian()">;
415417
def IsBE : Predicate<"!Subtarget->isLittleEndian()">;
416418
def IsWindows : Predicate<"Subtarget->isTargetWindows()">;
@@ -10726,6 +10728,15 @@ let Predicates = [HasMOPS, HasMTE], Defs = [NZCV], Size = 12, mayLoad = 0, maySt
1072610728
[], "$Rd = $Rd_wb,$Rn = $Rn_wb">, Sched<[]>;
1072710729
}
1072810730

10731+
//-----------------------------------------------------------------------------
10732+
// MOPS Granule Only Protection (FEAT_MOPS_GO)
10733+
10734+
let Predicates = [HasMOPS_GO, HasMTE] in {
10735+
defm SETGOP : MOPSGoMemorySetTaggingInsns<0b00, "setgop">;
10736+
defm SETGOM : MOPSGoMemorySetTaggingInsns<0b01, "setgom">;
10737+
defm SETGOE : MOPSGoMemorySetTaggingInsns<0b10, "setgoe">;
10738+
}
10739+
1072910740
//-----------------------------------------------------------------------------
1073010741
// v8.3 Pointer Authentication late patterns
1073110742

‎llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp‎

Lines changed: 14 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3955,6 +3955,7 @@ static const struct Extension {
39553955
{"f16f32dot", {AArch64::FeatureF16F32DOT}},
39563956
{"f16f32mm", {AArch64::FeatureF16F32MM}},
39573957
{"poe2", {AArch64::FeatureS1POE2}},
3958+
{"mops-go", {AArch64::FeatureMOPS_GO}},
39583959
};
39593960

39603961
static void setRequiredFeatureString(FeatureBitset FBS, std::string &Str) {
@@ -6048,7 +6049,19 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc,
60486049
case AArch64::MOPSSETGE:
60496050
case AArch64::MOPSSETGET:
60506051
case AArch64::MOPSSETGEN:
6051-
case AArch64::MOPSSETGETN: {
6052+
case AArch64::MOPSSETGETN:
6053+
case AArch64::SETGOP:
6054+
case AArch64::SETGOPT:
6055+
case AArch64::SETGOPN:
6056+
case AArch64::SETGOPTN:
6057+
case AArch64::SETGOM:
6058+
case AArch64::SETGOMT:
6059+
case AArch64::SETGOMN:
6060+
case AArch64::SETGOMTN:
6061+
case AArch64::SETGOE:
6062+
case AArch64::SETGOET:
6063+
case AArch64::SETGOEN:
6064+
case AArch64::SETGOETN: {
60526065
MCRegister Xd_wb = Inst.getOperand(0).getReg();
60536066
MCRegister Xn_wb = Inst.getOperand(1).getReg();
60546067
MCRegister Xd = Inst.getOperand(2).getReg();

‎llvm/test/MC/AArch64/arm-mops-go-diagnostics.s‎

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
1+
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+mops-go,+mte < %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
2+
3+
// All operand must be different from each other
4+
5+
// CHECK-ERROR: error: invalid SET instruction, destination and size registers are the same
6+
// CHECK-ERROR: error: invalid SET instruction, destination and source registers are the same
7+
// CHECK-ERROR: error: invalid SET instruction, source and size registers are the same
8+
setgop [x0]!, x0!, x1
9+
setgop [x0]!, x1!, x0
10+
setgop [x1]!, x0!, x0
11+
12+
// CHECK-ERROR: error: invalid SET instruction, destination and size registers are the same
13+
// CHECK-ERROR: error: invalid SET instruction, destination and source registers are the same
14+
// CHECK-ERROR: error: invalid SET instruction, source and size registers are the same
15+
setgom [x0]!, x0!, x1
16+
setgom [x0]!, x1!, x0
17+
setgom [x1]!, x0!, x0
18+
19+
// CHECK-ERROR: error: invalid SET instruction, destination and size registers are the same
20+
// CHECK-ERROR: error: invalid SET instruction, destination and source registers are the same
21+
// CHECK-ERROR: error: invalid SET instruction, source and size registers are the same
22+
setgoe [x0]!, x0!, x1
23+
setgoe [x0]!, x1!, x0
24+
setgoe [x1]!, x0!, x0
25+
26+
// SP cannot be used as argument at any position
27+
28+
// CHECK-ERROR: error: invalid operand for instruction
29+
// CHECK-ERROR: error: invalid operand for instruction
30+
// CHECK-ERROR: error: invalid operand for instruction
31+
setgop [sp]!, x1!, x2
32+
setgop [x0]!, sp!, x2
33+
setgop [x0]!, x1!, sp
34+
35+
// CHECK-ERROR: error: invalid operand for instruction
36+
// CHECK-ERROR: error: invalid operand for instruction
37+
// CHECK-ERROR: error: invalid operand for instruction
38+
setgom [sp]!, x1!, x2
39+
setgom [x0]!, sp!, x2
40+
setgom [x0]!, x1!, sp
41+
42+
// CHECK-ERROR: error: invalid operand for instruction
43+
// CHECK-ERROR: error: invalid operand for instruction
44+
// CHECK-ERROR: error: invalid operand for instruction
45+
setgoe [sp]!, x1!, x2
46+
setgoe [x0]!, sp!, x2
47+
setgoe [x0]!, x1!, sp
48+
49+
// CHECK-ERROR: error: invalid operand for instruction
50+
setgop [xzr]!, x1!, x2
51+
52+
// CHECK-ERROR: error: invalid operand for instruction
53+
setgom [xzr]!, x1!, x2
54+
55+
// CHECK-ERROR: error: invalid operand for instruction
56+
setgoe [xzr]!, x1!, x2

‎llvm/test/MC/AArch64/arm-mops-go.s‎

Lines changed: 89 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,89 @@
1+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+mops-go,+mte < %s \
2+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3+
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4+
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+all < %s \
6+
// RUN: | llvm-objdump -d --mattr=+mops-go,+mte --no-print-imm-hex - | FileCheck %s --check-prefix=CHECK-INST
7+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+all < %s \
8+
// RUN: | llvm-objdump -d --mattr=-mops-go,-mte --no-print-imm-hex - | FileCheck %s --check-prefix=CHECK-UNKNOWN
9+
// Disassemble encoding and check the re-encoding (-show-encoding) matches.
10+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+mops-go,+mte < %s \
11+
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
12+
// RUN: | llvm-mc -triple=aarch64 -mattr=+mops-go,+mte -disassemble -show-encoding \
13+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
14+
15+
//------------------------------------------------------------------------------
16+
// FEAT_MOPS_GO Extension instructions
17+
//------------------------------------------------------------------------------
18+
19+
setgop [x3]!, x2!, x1
20+
// CHECK-INST: setgop [x3]!, x2!, x1
21+
// CHECK-ENCODING: [0x43,0x00,0xc1,0x1d]
22+
// CHECK-UNKNOWN: 1dc10043
23+
// CHECK-ERROR: instruction requires: mops-go mte
24+
25+
setgom [x3]!, x2!, x1
26+
// CHECK-INST: setgom [x3]!, x2!, x1
27+
// CHECK-ENCODING: [0x43,0x40,0xc1,0x1d]
28+
// CHECK-UNKNOWN: 1dc14043
29+
// CHECK-ERROR: instruction requires: mops-go mte
30+
31+
setgoe [x3]!, x2!, x1
32+
// CHECK-INST: setgoe [x3]!, x2!, x1
33+
// CHECK-ENCODING: [0x43,0x80,0xc1,0x1d]
34+
// CHECK-UNKNOWN: 1dc18043
35+
// CHECK-ERROR: instruction requires: mops-go mte
36+
37+
setgopn [x3]!, x2!, x1
38+
// CHECK-INST: setgopn [x3]!, x2!, x1
39+
// CHECK-ENCODING: [0x43,0x20,0xc1,0x1d]
40+
// CHECK-UNKNOWN: 1dc12043
41+
// CHECK-ERROR: instruction requires: mops-go mte
42+
43+
setgomn [x3]!, x2!, x1
44+
// CHECK-INST: setgomn [x3]!, x2!, x1
45+
// CHECK-ENCODING: [0x43,0x60,0xc1,0x1d]
46+
// CHECK-UNKNOWN: 1dc16043
47+
// CHECK-ERROR: instruction requires: mops-go mte
48+
49+
setgoen [x3]!, x2!, x1
50+
// CHECK-INST: setgoen [x3]!, x2!, x1
51+
// CHECK-ENCODING: [0x43,0xa0,0xc1,0x1d]
52+
// CHECK-UNKNOWN: 1dc1a043
53+
// CHECK-ERROR: instruction requires: mops-go mte
54+
55+
setgopt [x3]!, x2!, x1
56+
// CHECK-INST: setgopt [x3]!, x2!, x1
57+
// CHECK-ENCODING: [0x43,0x10,0xc1,0x1d]
58+
// CHECK-UNKNOWN: 1dc11043
59+
// CHECK-ERROR: instruction requires: mops-go mte
60+
61+
setgomt [x3]!, x2!, x1
62+
// CHECK-INST: setgomt [x3]!, x2!, x1
63+
// CHECK-ENCODING: [0x43,0x50,0xc1,0x1d]
64+
// CHECK-UNKNOWN: 1dc15043
65+
// CHECK-ERROR: instruction requires: mops-go mte
66+
67+
setgoet [x3]!, x2!, x1
68+
// CHECK-INST: setgoet [x3]!, x2!, x1
69+
// CHECK-ENCODING: [0x43,0x90,0xc1,0x1d]
70+
// CHECK-UNKNOWN: 1dc19043
71+
// CHECK-ERROR: instruction requires: mops-go mte
72+
73+
setgoptn [x3]!, x2!, x1
74+
// CHECK-INST: setgoptn [x3]!, x2!, x1
75+
// CHECK-ENCODING: [0x43,0x30,0xc1,0x1d]
76+
// CHECK-UNKNOWN: 1dc13043
77+
// CHECK-ERROR: instruction requires: mops-go mte
78+
79+
setgomtn [x3]!, x2!, x1
80+
// CHECK-INST: setgomtn [x3]!, x2!, x1
81+
// CHECK-ENCODING: [0x43,0x70,0xc1,0x1d]
82+
// CHECK-UNKNOWN: 1dc17043
83+
// CHECK-ERROR: instruction requires: mops-go mte
84+
85+
setgoetn [x3]!, x2!, x1
86+
// CHECK-INST: setgoetn [x3]!, x2!, x1
87+
// CHECK-ENCODING: [0x43,0xb0,0xc1,0x1d]
88+
// CHECK-UNKNOWN: 1dc1b043
89+
// CHECK-ERROR: instruction requires: mops-go mte

‎llvm/unittests/TargetParser/TargetParserTest.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1451,6 +1451,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
14511451
AArch64::AEK_F16MM, AArch64::AEK_F16F32DOT,
14521452
AArch64::AEK_F16F32MM, AArch64::AEK_POE2,
14531453
AArch64::AEK_TEV, AArch64::AEK_BTIE,
1454+
AArch64::AEK_MOPS_GO,
14541455
};
14551456

14561457
std::vector<StringRef> Features;
@@ -1577,6 +1578,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
15771578
EXPECT_TRUE(llvm::is_contained(Features, "+poe2"));
15781579
EXPECT_TRUE(llvm::is_contained(Features, "+tev"));
15791580
EXPECT_TRUE(llvm::is_contained(Features, "+btie"));
1581+
EXPECT_TRUE(llvm::is_contained(Features, "+mops-go"));
15801582

15811583
// Assuming we listed every extension above, this should produce the same
15821584
// result.
@@ -1758,6 +1760,7 @@ TEST(TargetParserTest, AArch64ArchExtFeature) {
17581760
{"poe2", "nopoe2", "+poe2", "-poe2"},
17591761
{"tev", "notev", "+tev", "-tev"},
17601762
{"btie", "nobtie", "+btie", "-btie"},
1763+
{"mops-go", "nomops-go", "+mops-go", "-mops-go"},
17611764
};
17621765

17631766
for (unsigned i = 0; i < std::size(ArchExt); i++) {

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